Home
last modified time | relevance | path

Searched refs:IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_MASK (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/
DMIMX8QM6_cm4_core1.h49404 #define IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_MASK (0x80U) macro
49411 …<< IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_SHIFT)) & IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_MAS…
DMIMX8QM6_cm4_core0.h49404 #define IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_MASK (0x80U) macro
49411 …<< IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_SHIFT)) & IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_MAS…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX3/
DMIMX8QX3_cm4.h73152 #define IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_MASK (0x80U) macro
73159 …<< IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_SHIFT)) & IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_MAS…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX4/
DMIMX8DX4_cm4.h73152 #define IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_MASK (0x80U) macro
73159 …<< IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_SHIFT)) & IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_MAS…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX3/
DMIMX8DX3_cm4.h73152 #define IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_MASK (0x80U) macro
73159 …<< IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_SHIFT)) & IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_MAS…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX6/
DMIMX8QX6_dsp.h75660 #define IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_MASK (0x80U) macro
75667 …<< IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_SHIFT)) & IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_MAS…
DMIMX8QX6_cm4.h73154 #define IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_MASK (0x80U) macro
73161 …<< IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_SHIFT)) & IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_MAS…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX6/
DMIMX8DX6_cm4.h73154 #define IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_MASK (0x80U) macro
73161 …<< IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_SHIFT)) & IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_MAS…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX5/
DMIMX8QX5_cm4.h73153 #define IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_MASK (0x80U) macro
73160 …<< IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_SHIFT)) & IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_MAS…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX5/
DMIMX8DX5_cm4.h73154 #define IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_MASK (0x80U) macro
73161 …<< IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_SHIFT)) & IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_MAS…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX6/
DMIMX8UX6_cm4.h73155 #define IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_MASK (0x80U) macro
73162 …<< IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_SHIFT)) & IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_MAS…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX5/
DMIMX8UX5_cm4.h73155 #define IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_MASK (0x80U) macro
73162 …<< IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_SHIFT)) & IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_MAS…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX4/
DMIMX8QX4_cm4.h73151 #define IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_MASK (0x80U) macro
73158 …<< IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_SHIFT)) & IRIS_MVPL_FETCHDECODE_CONTROL_1_RawPixel_MAS…