Home
last modified time | relevance | path

Searched refs:IRIS_MVPL_FETCHDECODE_BURSTBUFFERMANAGEMENT_1_SetNumBuffers_SHIFT (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/
DMIMX8QM6_cm4_core1.h48947 #define IRIS_MVPL_FETCHDECODE_BURSTBUFFERMANAGEMENT_1_SetNumBuffers_SHIFT (0U) macro
48954 …mBuffers(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FETCHDECODE_BURSTBUFFERMANAGEMENT_1_SetNumBu…
DMIMX8QM6_cm4_core0.h48947 #define IRIS_MVPL_FETCHDECODE_BURSTBUFFERMANAGEMENT_1_SetNumBuffers_SHIFT (0U) macro
48954 …mBuffers(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FETCHDECODE_BURSTBUFFERMANAGEMENT_1_SetNumBu…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX3/
DMIMX8QX3_cm4.h72695 #define IRIS_MVPL_FETCHDECODE_BURSTBUFFERMANAGEMENT_1_SetNumBuffers_SHIFT (0U) macro
72702 …mBuffers(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FETCHDECODE_BURSTBUFFERMANAGEMENT_1_SetNumBu…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX4/
DMIMX8DX4_cm4.h72695 #define IRIS_MVPL_FETCHDECODE_BURSTBUFFERMANAGEMENT_1_SetNumBuffers_SHIFT (0U) macro
72702 …mBuffers(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FETCHDECODE_BURSTBUFFERMANAGEMENT_1_SetNumBu…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX3/
DMIMX8DX3_cm4.h72695 #define IRIS_MVPL_FETCHDECODE_BURSTBUFFERMANAGEMENT_1_SetNumBuffers_SHIFT (0U) macro
72702 …mBuffers(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FETCHDECODE_BURSTBUFFERMANAGEMENT_1_SetNumBu…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX6/
DMIMX8QX6_dsp.h75175 #define IRIS_MVPL_FETCHDECODE_BURSTBUFFERMANAGEMENT_1_SetNumBuffers_SHIFT (0U) macro
75182 …mBuffers(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FETCHDECODE_BURSTBUFFERMANAGEMENT_1_SetNumBu…
DMIMX8QX6_cm4.h72697 #define IRIS_MVPL_FETCHDECODE_BURSTBUFFERMANAGEMENT_1_SetNumBuffers_SHIFT (0U) macro
72704 …mBuffers(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FETCHDECODE_BURSTBUFFERMANAGEMENT_1_SetNumBu…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX6/
DMIMX8DX6_cm4.h72697 #define IRIS_MVPL_FETCHDECODE_BURSTBUFFERMANAGEMENT_1_SetNumBuffers_SHIFT (0U) macro
72704 …mBuffers(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FETCHDECODE_BURSTBUFFERMANAGEMENT_1_SetNumBu…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX5/
DMIMX8QX5_cm4.h72696 #define IRIS_MVPL_FETCHDECODE_BURSTBUFFERMANAGEMENT_1_SetNumBuffers_SHIFT (0U) macro
72703 …mBuffers(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FETCHDECODE_BURSTBUFFERMANAGEMENT_1_SetNumBu…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX5/
DMIMX8DX5_cm4.h72697 #define IRIS_MVPL_FETCHDECODE_BURSTBUFFERMANAGEMENT_1_SetNumBuffers_SHIFT (0U) macro
72704 …mBuffers(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FETCHDECODE_BURSTBUFFERMANAGEMENT_1_SetNumBu…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX6/
DMIMX8UX6_cm4.h72698 #define IRIS_MVPL_FETCHDECODE_BURSTBUFFERMANAGEMENT_1_SetNumBuffers_SHIFT (0U) macro
72705 …mBuffers(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FETCHDECODE_BURSTBUFFERMANAGEMENT_1_SetNumBu…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX5/
DMIMX8UX5_cm4.h72698 #define IRIS_MVPL_FETCHDECODE_BURSTBUFFERMANAGEMENT_1_SetNumBuffers_SHIFT (0U) macro
72705 …mBuffers(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FETCHDECODE_BURSTBUFFERMANAGEMENT_1_SetNumBu…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX4/
DMIMX8QX4_cm4.h72694 #define IRIS_MVPL_FETCHDECODE_BURSTBUFFERMANAGEMENT_1_SetNumBuffers_SHIFT (0U) macro
72701 …mBuffers(x) (((uint32_t)(((uint32_t)(x)) << IRIS_MVPL_FETCHDECODE_BURSTBUFFERMANAGEMENT_1_SetNumBu…