Searched refs:IP_SCG (Results 1 – 16 of 16) sorted by relevance
387 RegValue = IP_SCG->RCCR; in SetInputSouceSytemClock()390 IP_SCG->RCCR = RegValue; in SetInputSouceSytemClock()395 … ScsStatus = (((IP_SCG->CSR & SCG_CSR_SCS_MASK) >> SCG_CSR_SCS_SHIFT) != (SourceClock))?0U:1U; in SetInputSouceSytemClock()475 IP_SCG->SIRCCSR &= (~((uint32)SCG_SIRCCSR_LK_MASK)); in Clock_Ip_SetSirc_TrustedCall()478 IP_SCG->SIRCCSR &= (~((uint32)SCG_SIRCCSR_SIRCEN_MASK)); in Clock_Ip_SetSirc_TrustedCall()481 IP_SCG->SIRCCSR &= (~((uint32)SCG_SIRCCSR_SIRCLPEN_MASK)); in Clock_Ip_SetSirc_TrustedCall()487 IP_SCG->SIRCCFG = SCG_SIRCCFG_RANGE(SircConfig.Range); in Clock_Ip_SetSirc_TrustedCall()490 IP_SCG->SIRCCSR |= SCG_SIRCCSR_SIRCEN(1U); in Clock_Ip_SetSirc_TrustedCall()493 IP_SCG->SIRCCSR |= SCG_SIRCCSR_SIRCLPEN(SircConfig.LowPowerModeEnable); in Clock_Ip_SetSirc_TrustedCall()499 … IrcoscStatus = (((IP_SCG->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK) >> SCG_SIRCCSR_SIRCVLD_SHIFT)); in Clock_Ip_SetSirc_TrustedCall()[all …]
190 if ((IP_SCG->SOSCCSR & SCG_SOSCCSR_SOSCEN_MASK) != 0U) in Clock_Ip_CompleteSOSC()196 … SoscStatus = (((IP_SCG->SOSCCSR & SCG_SOSCCSR_SOSCVLD_MASK) >> SCG_SOSCCSR_SOSCVLD_SHIFT)); in Clock_Ip_CompleteSOSC()252 IP_SCG->SOSCCSR &= (~((uint32)SCG_SOSCCSR_LK_MASK)); in Clock_Ip_ResetSOSC_TrustedCall()255 IP_SCG->SOSCCSR &= (~((uint32)SCG_SOSCCSR_SOSCCM_MASK)); in Clock_Ip_ResetSOSC_TrustedCall()258 IP_SCG->SOSCCSR &= (~((uint32)SCG_SOSCCSR_SOSCCMRE_MASK)); in Clock_Ip_ResetSOSC_TrustedCall()261 IP_SCG->SOSCCSR &= (~((uint32)SCG_SOSCCSR_SOSCEN_MASK)); in Clock_Ip_ResetSOSC_TrustedCall()279 IP_SCG->SOSCCFG &= ~SCG_SOSCCFG_HGO_MASK; in Clock_Ip_SetSOSC_TrustedCall()287 IP_SCG->SOSCCFG |= SCG_SOSCCFG_HGO_MASK; in Clock_Ip_SetSOSC_TrustedCall()300 IP_SCG->SOSCCFG &= ~SCG_SOSCCFG_RANGE_MASK; in Clock_Ip_SetSOSC_TrustedCall()304 IP_SCG->SOSCCFG |= SCG_SOSCCFG_RANGE(2U); in Clock_Ip_SetSOSC_TrustedCall()[all …]
194 if ((IP_SCG->SPLLCSR & SCG_SPLLCSR_SPLLEN_MASK) != 0U) in Clock_Ip_CompleteSpll()200 … SpllStatus = (((IP_SCG->SPLLCSR & SCG_SPLLCSR_SPLLVLD_MASK) >> SCG_SPLLCSR_SPLLVLD_SHIFT)); in Clock_Ip_CompleteSpll()259 IP_SCG->SPLLCSR &= (~((uint32)SCG_SPLLCSR_LK_MASK)); in Clock_Ip_ResetSpll_TrustedCall()262 IP_SCG->SPLLCSR &= (~((uint32)SCG_SPLLCSR_SPLLCM_MASK)); in Clock_Ip_ResetSpll_TrustedCall()265 IP_SCG->SPLLCSR &= (~((uint32)SCG_SPLLCSR_SPLLCMRE_MASK)); in Clock_Ip_ResetSpll_TrustedCall()268 IP_SCG->SPLLCSR &= (~((uint32)SCG_SPLLCSR_SPLLEN_MASK)); in Clock_Ip_ResetSpll_TrustedCall()272 IP_SCG->SPLLCFG &= (~((uint32)SCG_SPLLCFG_SOURCE_MASK)); in Clock_Ip_ResetSpll_TrustedCall()274 IP_SCG->SPLLCFG &= (~((uint32)SCG_SPLLCFG_PREDIV_MASK)); in Clock_Ip_ResetSpll_TrustedCall()275 IP_SCG->SPLLCFG &= (~((uint32)SCG_SPLLCFG_MULT_MASK)); in Clock_Ip_ResetSpll_TrustedCall()286 IP_SCG->SPLLCFG |= SCG_SPLLCFG_SOURCE(0UL); in Clock_Ip_SetSpll_TrustedCall()[all …]
497 RegValue = IP_SCG->RCCR; in Clock_Ip_SetScgRunDivcore_TrustedCall()500 IP_SCG->RCCR = RegValue; in Clock_Ip_SetScgRunDivcore_TrustedCall()510 RegValue = IP_SCG->RCCR; in Clock_Ip_SetScgRunDivbus_TrustedCall()513 IP_SCG->RCCR = RegValue; in Clock_Ip_SetScgRunDivbus_TrustedCall()523 RegValue = IP_SCG->RCCR; in Clock_Ip_SetScgRunDivslow_TrustedCall()526 IP_SCG->RCCR = RegValue; in Clock_Ip_SetScgRunDivslow_TrustedCall()536 RegValue = IP_SCG->VCCR; in Clock_Ip_SetScgVlprDivcore_TrustedCall()539 IP_SCG->VCCR = RegValue; in Clock_Ip_SetScgVlprDivcore_TrustedCall()549 RegValue = IP_SCG->VCCR; in Clock_Ip_SetScgVlprDivbus_TrustedCall()552 IP_SCG->VCCR = RegValue; in Clock_Ip_SetScgVlprDivbus_TrustedCall()[all …]
366 IP_SCG->FIRCCFG = SCG_FIRCCFG_RANGE(0U); in SetFircToResetValue_TrustedCall()369 IP_SCG->FIRCCSR |= (SCG_FIRCCSR_FIRCEN(1U) | SCG_FIRCCSR_FIRCREGOFF(0U)); in SetFircToResetValue_TrustedCall()480 if ((IP_SCG->FIRCCSR & SCG_FIRCCSR_FIRCEN_MASK) == 0U) in Clock_Ip_SpecificPlatformInitClock()496 … IrcoscStatus = (((IP_SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK) >> SCG_FIRCCSR_FIRCVLD_SHIFT)); in Clock_Ip_SpecificPlatformInitClock()552 …FircConfiguration.Enable = (uint16)(IP_SCG->FIRCCSR & SCG_FIRCCSR_FIRCEN_MASK) >> SCG_FIRCCSR_FIRC… in getFircConfig()553 …FircConfiguration.Range = (uint8)(IP_SCG->FIRCCFG & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_RANGE_S… in getFircConfig()554 …FircConfiguration.Regulator = (uint8)(IP_SCG->FIRCCSR & SCG_FIRCCSR_FIRCREGOFF_MASK) >> SCG_FIRCCS… in getFircConfig()586 …SoscConfiguration.Enable = (uint16)(IP_SCG->SOSCCSR & SCG_SOSCCSR_SOSCEN_MASK) >> SCG_SOSCCSR_SOSC… in getSoscConfig()619 …SpllConfiguration.Enable = (uint16)(IP_SCG->SPLLCSR & SCG_SPLLCSR_SPLLEN_MASK) >> SCG_SPLLCSR_SPLL… in getSpllConfig()620 …SpllConfiguration.Predivider = (uint8)((IP_SCG->SPLLCFG & SCG_SPLLCFG_PREDIV_MASK) >> SCG_SPLLCFG_… in getSpllConfig()[all …]
512 RegValue = IP_SCG->RCCR; in Clock_Ip_ResetScgRunSel_TrustedCall()515 IP_SCG->RCCR = RegValue; in Clock_Ip_ResetScgRunSel_TrustedCall()523 RegValue = IP_SCG->RCCR; in Clock_Ip_SetScgRunSel_TrustedCall()526 IP_SCG->RCCR = RegValue; in Clock_Ip_SetScgRunSel_TrustedCall()537 RegValue = IP_SCG->VCCR; in Clock_Ip_SetScgVlprSel_TrustedCall()540 IP_SCG->VCCR = RegValue; in Clock_Ip_SetScgVlprSel_TrustedCall()553 RegValue = IP_SCG->HCCR; in Clock_Ip_ResetScgHsrunSel_TrustedCall()556 IP_SCG->HCCR = RegValue; in Clock_Ip_ResetScgHsrunSel_TrustedCall()563 RegValue = IP_SCG->HCCR; in Clock_Ip_SetScgHsrunSel_TrustedCall()566 IP_SCG->HCCR = RegValue; in Clock_Ip_SetScgHsrunSel_TrustedCall()[all …]
706 …return (uint32)CLOCK_IP_FIRC_FREQUENCY & Clock_Ip_u32EnableClock[((IP_SCG->FIRCCSR & SCG_FIRCCSR_F… in get_FIRC_CLK_Frequency()712 …return Clock_Ip_u32Sosc & Clock_Ip_u32EnableClock[((IP_SCG->SOSCCSR & SCG_SOSCCSR_SOSCEN_MASK) >> … in get_SOSC_CLK_Frequency()718 …return (uint32)CLOCK_IP_SIRC_FREQUENCY & Clock_Ip_u32EnableClock[((IP_SCG->SIRCCSR & SCG_SIRCCSR_S… in get_SIRC_CLK_Frequency()725 if (SpllChecksum != IP_SCG->SPLLCFG) in get_SPLL_CLK_Frequency()727 SpllChecksum = IP_SCG->SPLLCFG; in get_SPLL_CLK_Frequency()729 SpllFreq = PLL_VCO(IP_SCG); in get_SPLL_CLK_Frequency()730 …SpllFreq &= Clock_Ip_u32EnableClock[((IP_SCG->SPLLCSR & SCG_SPLLCSR_SPLLEN_MASK) >> SCG_SPLLCSR_SP… in get_SPLL_CLK_Frequency()733 …return (((((IP_SCG->SPLLCSR & SCG_SPLLCSR_SPLLVLD_MASK) >> SCG_SPLLCSR_SPLLVLD_SHIFT)) != 0U )? Sp… in get_SPLL_CLK_Frequency()740 …uint32 DivValue = Clock_Ip_au8DividerMappingValue[((IP_SCG->SIRCDIV & SCG_SIRCDIV_SIRCDIV1_MASK) >… in get_SIRCDIV1_CLK_Frequency()747 …uint32 DivValue = Clock_Ip_au8DividerMappingValue[((IP_SCG->SIRCDIV & SCG_SIRCDIV_SIRCDIV2_MASK) >… in get_SIRCDIV2_CLK_Frequency()[all …]
1751 (volatile Clock_Ip_ScgPeriphAsyncDivType*)( &(IP_SCG->SIRCDIV) ),1752 (volatile Clock_Ip_ScgPeriphAsyncDivType*)( &(IP_SCG->FIRCDIV) ),1753 (volatile Clock_Ip_ScgPeriphAsyncDivType*)( &(IP_SCG->SOSCDIV) ),1755 (volatile Clock_Ip_ScgPeriphAsyncDivType*)( &(IP_SCG->SPLLDIV) ),
102 #define IP_SCG ((SCG_Type *)IP_SCG_BASE) macro106 #define IP_SCG_BASE_PTRS { IP_SCG }
106 #define IP_SCG ((SCG_Type *)IP_SCG_BASE) macro110 #define IP_SCG_BASE_PTRS { IP_SCG }
