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Searched refs:IP_PCC (Results 1 – 14 of 14) sorted by relevance

/hal_nxp-latest/s32/drivers/s32k1/Mcu/src/
DClock_Ip_Frequency.c939 …Frequency = Clock_Ip_apfFreqTablePcs2[((IP_PCC->PCCn[59U] & PCC_PCCn_PCS_MASK) >> PCC_PCCn_PCS_SH… in get_ADC0_CLK_Frequency()
940 …Frequency &= Clock_Ip_u32EnableGate[((IP_PCC->PCCn[59U] & PCC_PCCn_CGC_MASK) >> PCC_PCCn_CGC_SHIFT… in get_ADC0_CLK_Frequency()
949 …Frequency = Clock_Ip_apfFreqTablePcs2[((IP_PCC->PCCn[39U] & PCC_PCCn_PCS_MASK) >> PCC_PCCn_PCS_SH… in get_ADC1_CLK_Frequency()
950 …Frequency &= Clock_Ip_u32EnableGate[((IP_PCC->PCCn[39U] & PCC_PCCn_CGC_MASK) >> PCC_PCCn_CGC_SHIFT… in get_ADC1_CLK_Frequency()
970 …Frequency &= Clock_Ip_u32EnableGate[((IP_PCC->PCCn[115] & PCC_PCCn_CGC_MASK) >> PCC_PCCn_CGC_SHIFT… in get_CMP0_CLK_Frequency()
979 …Frequency &= Clock_Ip_u32EnableGate[((IP_PCC->PCCn[62] & PCC_PCCn_CGC_MASK) >> PCC_PCCn_CGC_SHIFT)… in get_CMU0_CLK_Frequency()
989 …Frequency &= Clock_Ip_u32EnableGate[((IP_PCC->PCCn[63] & PCC_PCCn_CGC_MASK) >> PCC_PCCn_CGC_SHIFT)… in get_CMU1_CLK_Frequency()
999 …Frequency &= Clock_Ip_u32EnableGate[((IP_PCC->PCCn[50] & PCC_PCCn_CGC_MASK) >> PCC_PCCn_CGC_SHIFT)… in get_CRC0_CLK_Frequency()
1015 …Frequency &= Clock_Ip_u32EnableGate[((IP_PCC->PCCn[33] & PCC_PCCn_CGC_MASK) >> PCC_PCCn_CGC_SHIFT)… in get_DMAMUX0_CLK_Frequency()
1032 …Frequency = Clock_Ip_apfFreqTablePcs1[((IP_PCC->PCCn[121U] & PCC_PCCn_PCS_MASK) >> PCC_PCCn_PCS_S… in get_ENET_CLK_Frequency()
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DClock_Ip_Specific.c417 RegValue = IP_PCC->PCCn[Clock_Ip_au8ClockFeatures[CMU0_CLK][CLOCK_IP_GATE_INDEX]]; in Clock_Ip_EnableCmu0Gate_TrustedCall()
420 IP_PCC->PCCn[Clock_Ip_au8ClockFeatures[CMU0_CLK][CLOCK_IP_GATE_INDEX]] = RegValue; in Clock_Ip_EnableCmu0Gate_TrustedCall()
430 RegValue = IP_PCC->PCCn[Clock_Ip_au8ClockFeatures[CMU1_CLK][CLOCK_IP_GATE_INDEX]]; in Clock_Ip_EnableCmu1Gate_TrustedCall()
433 IP_PCC->PCCn[Clock_Ip_au8ClockFeatures[CMU1_CLK][CLOCK_IP_GATE_INDEX]] = RegValue; in Clock_Ip_EnableCmu1Gate_TrustedCall()
655 if(((IP_PCC->PCCn[62] & PCC_PCCn_CGC_MASK) >> PCC_PCCn_CGC_SHIFT) == 1U) in getCmuFircConfig()
662 if(((IP_PCC->PCCn[63] & PCC_PCCn_CGC_MASK) >> PCC_PCCn_CGC_SHIFT) == 1U) in getCmuFircConfig()
1033 if(((IP_PCC->PCCn[62] & PCC_PCCn_CGC_MASK) >> PCC_PCCn_CGC_SHIFT) == 1U) in Clock_Ip_ClockPowerModeChangeNotification()
1040 if(((IP_PCC->PCCn[63] & PCC_PCCn_CGC_MASK) >> PCC_PCCn_CGC_SHIFT) == 1U) in Clock_Ip_ClockPowerModeChangeNotification()
1087 if(((IP_PCC->PCCn[62] & PCC_PCCn_CGC_MASK) >> PCC_PCCn_CGC_SHIFT) == 1U) in Clock_Ip_ClockPowerModeChangeNotification()
1094 if(((IP_PCC->PCCn[63] & PCC_PCCn_CGC_MASK) >> PCC_PCCn_CGC_SHIFT) == 1U) in Clock_Ip_ClockPowerModeChangeNotification()
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DClock_Ip_Selector.c730 IP_PCC->PCCn[PccIndex] &= ~(PCC_PCCn_CGC_MASK); in Clock_Ip_ResetPccPcsSelect_TrustedCall()
731 IP_PCC->PCCn[PccIndex] &= ~(PCC_PCCn_PCS_MASK); in Clock_Ip_ResetPccPcsSelect_TrustedCall()
739 RegValue = IP_PCC->PCCn[PccIndex]; in Clock_Ip_SetPccPcsSelect_TrustedCall()
742 IP_PCC->PCCn[PccIndex] = RegValue; in Clock_Ip_SetPccPcsSelect_TrustedCall()
DClock_Ip_Gate.c430 RegValue = IP_PCC->PCCn[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_GATE_INDEX]]; in Clock_Ip_ClockSetPccCgcEnable_TrustedCall()
433 IP_PCC->PCCn[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_GATE_INDEX]] = RegValue; in Clock_Ip_ClockSetPccCgcEnable_TrustedCall()
DClock_Ip_Divider.c626 RegValue = IP_PCC->PCCn[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_DIVIDER_INDEX]]; in Clock_Ip_SetPccPcdDivFrac_TrustedCall()
630 IP_PCC->PCCn[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_DIVIDER_INDEX]] = RegValue; in Clock_Ip_SetPccPcdDivFrac_TrustedCall()
/hal_nxp-latest/s32/drivers/s32k3/Mcu/src/
DClock_Ip_Monitor.c238 if (0U == ((IP_PCC->PCCn[62] & PCC_PCCn_CGC_MASK) >> PCC_PCCn_CGC_SHIFT)) in Clock_Ip_DisableCmuFcFceRefCntLfrefHfref()
250 IP_PCC->PCCn[62] |= PCC_PCCn_CGC_MASK; in Clock_Ip_DisableCmuFcFceRefCntLfrefHfref()
253 if (0U == ((IP_PCC->PCCn[63] & PCC_PCCn_CGC_MASK) >> PCC_PCCn_CGC_SHIFT)) in Clock_Ip_DisableCmuFcFceRefCntLfrefHfref()
265 IP_PCC->PCCn[63] |= PCC_PCCn_CGC_MASK; in Clock_Ip_DisableCmuFcFceRefCntLfrefHfref()
/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K116_PCC.h86 #define IP_PCC ((PCC_Type *)IP_PCC_BASE) macro
90 #define IP_PCC_BASE_PTRS { IP_PCC }
DS32K118_PCC.h86 #define IP_PCC ((PCC_Type *)IP_PCC_BASE) macro
90 #define IP_PCC_BASE_PTRS { IP_PCC }
DS32K142_PCC.h86 #define IP_PCC ((PCC_Type *)IP_PCC_BASE) macro
90 #define IP_PCC_BASE_PTRS { IP_PCC }
DS32K142W_PCC.h86 #define IP_PCC ((PCC_Type *)IP_PCC_BASE) macro
90 #define IP_PCC_BASE_PTRS { IP_PCC }
DS32K146_PCC.h86 #define IP_PCC ((PCC_Type *)IP_PCC_BASE) macro
90 #define IP_PCC_BASE_PTRS { IP_PCC }
DS32K144W_PCC.h86 #define IP_PCC ((PCC_Type *)IP_PCC_BASE) macro
90 #define IP_PCC_BASE_PTRS { IP_PCC }
DS32K144_PCC.h86 #define IP_PCC ((PCC_Type *)IP_PCC_BASE) macro
90 #define IP_PCC_BASE_PTRS { IP_PCC }
DS32K148_PCC.h86 #define IP_PCC ((PCC_Type *)IP_PCC_BASE) macro
90 #define IP_PCC_BASE_PTRS { IP_PCC }