Searched refs:IP_LPSPI0_BASE (Results 1 – 9 of 9) sorted by relevance
| /hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/ |
| D | S32K116_LPSPI.h | 102 #define IP_LPSPI0_BASE (0x4002C000u) macro 104 #define IP_LPSPI0 ((LPSPI_Type *)IP_LPSPI0_BASE) 106 #define IP_LPSPI_BASE_ADDRS { IP_LPSPI0_BASE }
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| D | S32K148_LPSPI.h | 102 #define IP_LPSPI0_BASE (0x4002C000u) macro 104 #define IP_LPSPI0 ((LPSPI_Type *)IP_LPSPI0_BASE) 114 #define IP_LPSPI_BASE_ADDRS { IP_LPSPI0_BASE, IP_LPSPI1_BASE, IP_LPSPI2_BASE }
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| D | S32K118_LPSPI.h | 102 #define IP_LPSPI0_BASE (0x4002C000u) macro 104 #define IP_LPSPI0 ((LPSPI_Type *)IP_LPSPI0_BASE) 110 #define IP_LPSPI_BASE_ADDRS { IP_LPSPI0_BASE, IP_LPSPI1_BASE }
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| D | S32K144_LPSPI.h | 102 #define IP_LPSPI0_BASE (0x4002C000u) macro 104 #define IP_LPSPI0 ((LPSPI_Type *)IP_LPSPI0_BASE) 114 #define IP_LPSPI_BASE_ADDRS { IP_LPSPI0_BASE, IP_LPSPI1_BASE, IP_LPSPI2_BASE }
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| D | S32K146_LPSPI.h | 102 #define IP_LPSPI0_BASE (0x4002C000u) macro 104 #define IP_LPSPI0 ((LPSPI_Type *)IP_LPSPI0_BASE) 114 #define IP_LPSPI_BASE_ADDRS { IP_LPSPI0_BASE, IP_LPSPI1_BASE, IP_LPSPI2_BASE }
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| D | S32K142W_LPSPI.h | 102 #define IP_LPSPI0_BASE (0x4002C000u) macro 104 #define IP_LPSPI0 ((LPSPI_Type *)IP_LPSPI0_BASE) 114 #define IP_LPSPI_BASE_ADDRS { IP_LPSPI0_BASE, IP_LPSPI1_BASE, IP_LPSPI2_BASE }
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| D | S32K142_LPSPI.h | 102 #define IP_LPSPI0_BASE (0x4002C000u) macro 104 #define IP_LPSPI0 ((LPSPI_Type *)IP_LPSPI0_BASE) 110 #define IP_LPSPI_BASE_ADDRS { IP_LPSPI0_BASE, IP_LPSPI1_BASE }
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| D | S32K144W_LPSPI.h | 102 #define IP_LPSPI0_BASE (0x4002C000u) macro 104 #define IP_LPSPI0 ((LPSPI_Type *)IP_LPSPI0_BASE) 114 #define IP_LPSPI_BASE_ADDRS { IP_LPSPI0_BASE, IP_LPSPI1_BASE, IP_LPSPI2_BASE }
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| /hal_nxp-latest/s32/mcux/devices/S32K146/ |
| D | S32K146_device.h | 590 #define LPSPI0_BASE IP_LPSPI0_BASE
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