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Searched refs:IOMUXD_SCU_GPIO0_04_DSE_MASK (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/
DMIMX8QM6_ca53.h37453 #define IOMUXD_SCU_GPIO0_04_DSE_MASK (0x7U) macro
37465 … (((uint32_t)(((uint32_t)(x)) << IOMUXD_SCU_GPIO0_04_DSE_SHIFT)) & IOMUXD_SCU_GPIO0_04_DSE_MASK)
DMIMX8QM6_dsp.h40291 #define IOMUXD_SCU_GPIO0_04_DSE_MASK (0x7U) macro
40303 … (((uint32_t)(((uint32_t)(x)) << IOMUXD_SCU_GPIO0_04_DSE_SHIFT)) & IOMUXD_SCU_GPIO0_04_DSE_MASK)
DMIMX8QM6_cm4_core1.h29573 #define IOMUXD_SCU_GPIO0_04_DSE_MASK (0x7U) macro
29575 … (((uint32_t)(((uint32_t)(x)) << IOMUXD_SCU_GPIO0_04_DSE_SHIFT)) & IOMUXD_SCU_GPIO0_04_DSE_MASK)
DMIMX8QM6_cm4_core0.h29573 #define IOMUXD_SCU_GPIO0_04_DSE_MASK (0x7U) macro
29575 … (((uint32_t)(((uint32_t)(x)) << IOMUXD_SCU_GPIO0_04_DSE_SHIFT)) & IOMUXD_SCU_GPIO0_04_DSE_MASK)