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Searched refs:IOMUXD_ADC_IN7_mux_mode_MASK (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/
DMIMX8QM6_ca53.h46375 #define IOMUXD_ADC_IN7_mux_mode_MASK (0x38000000U) macro
46383 … (((uint32_t)(((uint32_t)(x)) << IOMUXD_ADC_IN7_mux_mode_SHIFT)) & IOMUXD_ADC_IN7_mux_mode_MASK)
DMIMX8QM6_dsp.h49213 #define IOMUXD_ADC_IN7_mux_mode_MASK (0x38000000U) macro
49221 … (((uint32_t)(((uint32_t)(x)) << IOMUXD_ADC_IN7_mux_mode_SHIFT)) & IOMUXD_ADC_IN7_mux_mode_MASK)
DMIMX8QM6_cm4_core1.h35589 #define IOMUXD_ADC_IN7_mux_mode_MASK (0x38000000U) macro
35597 … (((uint32_t)(((uint32_t)(x)) << IOMUXD_ADC_IN7_mux_mode_SHIFT)) & IOMUXD_ADC_IN7_mux_mode_MASK)
DMIMX8QM6_cm4_core0.h35589 #define IOMUXD_ADC_IN7_mux_mode_MASK (0x38000000U) macro
35597 … (((uint32_t)(((uint32_t)(x)) << IOMUXD_ADC_IN7_mux_mode_SHIFT)) & IOMUXD_ADC_IN7_mux_mode_MASK)