Searched refs:INT_STATUS (Results 1 – 25 of 203) sorted by relevance
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343 return ((base->INT_STATUS) & SSARC_INT_STATUS_ALL); in SSARC_GetStatusFlags()358 base->INT_STATUS = mask; in SSARC_ClearStatusFlags()369 return (base->INT_STATUS & SSARC_LP_INT_STATUS_ERR_INDEX_MASK); in SSARC_GetErrorIndex()
109 while ((FLASH->INT_STATUS & FLASH_INT_STATUS_DONE_MASK) == 0UL) in mflash_drv_is_readable()113 result = FLASH->INT_STATUS; in mflash_drv_is_readable()
384 return base->INT_STATUS; in TSC_GetInterruptStatusFlags()396 base->INT_STATUS = mask; in TSC_ClearInterruptStatusFlags()
290 return base->INT_STATUS & (uint32_t)kFLEXRAM_InterruptStatusAll; in FLEXRAM_GetInterruptStatus()301 base->INT_STATUS |= status; in FLEXRAM_ClearInterruptStatus()
92 base->INT_STATUS |= (uint32_t)kFLEXRAM_InterruptStatusAll; in FLEXRAM_Init()
404 return base->INT[domain].INT_STATUS; in LCDIFV2_GetInterruptStatus()416 base->INT[domain].INT_STATUS = mask; in LCDIFV2_ClearInterruptStatus()
103 base->INT[0].INT_STATUS = 0xFFFFFFFFU; in LCDIFV2_ResetRegister()104 base->INT[1].INT_STATUS = 0xFFFFFFFFU; in LCDIFV2_ResetRegister()
983 uint32_t intStatus = base->INT_STATUS; in USDHC_GetEnabledInterruptStatusFlags()996 return base->INT_STATUS; in USDHC_GetInterruptStatusFlags()1007 base->INT_STATUS = mask; in USDHC_ClearInterruptStatusFlags()
276 while (!(PUF_SRAM_CTRL->INT_STATUS & PUF_SRAM_CTRL_INT_STATUS_READY_MASK)) in SystemInit()
277 while ((PUF_SRAM_CTRL->INT_STATUS & PUF_SRAM_CTRL_INT_STATUS_READY_MASK) == 0UL) in SystemInit()
278 while ((PUF_SRAM_CTRL->INT_STATUS & PUF_SRAM_CTRL_INT_STATUS_READY_MASK) == 0UL) in SystemInit()
362 while ((FLASH->INT_STATUS & FLASH_INT_STATUS_DONE_MASK) == 0UL) in CLOCK_SetFLASHAccessCyclesForFreq()
603 while (0UL == (PUF_SRAM_CTRL->INT_STATUS & PUF_SRAM_CTRL_INT_STATUS_READY_MASK)) in POWER_EnterPowerDown()
623 while (0UL == (PUF_SRAM_CTRL->INT_STATUS & PUF_SRAM_CTRL_INT_STATUS_READY_MASK)) in POWER_EnterPowerDown()
