| /hal_nxp-latest/mcux/mcux-sdk/drivers/lcdifv2/ |
| D | fsl_lcdifv2.h | 380 base->INT[domain].INT_ENABLE |= mask; in LCDIFV2_EnableInterrupts()
392 base->INT[domain].INT_ENABLE &= ~mask; in LCDIFV2_DisableInterrupts()
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| D | fsl_lcdifv2.c | 82 base->INT[0].INT_ENABLE = 0U; in LCDIFV2_ResetRegister()
83 base->INT[1].INT_ENABLE = 0U; in LCDIFV2_ResetRegister()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC5534/drivers/ |
| D | fsl_power.c | 3102 flash_int_enable_reg = FLASH->INT_ENABLE; /* Save INT_ENABLE register. */ in POWER_SetSystemClock12MHZ()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC5536/drivers/ |
| D | fsl_power.c | 3102 flash_int_enable_reg = FLASH->INT_ENABLE; /* Save INT_ENABLE register. */ in POWER_SetSystemClock12MHZ()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S36/drivers/ |
| D | fsl_power.c | 3102 flash_int_enable_reg = FLASH->INT_ENABLE; /* Save INT_ENABLE register. */ in POWER_SetSystemClock12MHZ()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S06/ |
| D | LPC55S06.h | 8065 __I uint32_t INT_ENABLE; /**< Interrupt enable bits, offset: 0xFE4 */ member
19476 __I uint32_t INT_ENABLE; /**< Interrupt Enable Register, offset: 0x3E4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S04/ |
| D | LPC55S04.h | 8065 __I uint32_t INT_ENABLE; /**< Interrupt enable bits, offset: 0xFE4 */ member
19476 __I uint32_t INT_ENABLE; /**< Interrupt Enable Register, offset: 0x3E4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S16/ |
| D | LPC55S16.h | 8497 __I uint32_t INT_ENABLE; /**< Interrupt enable bits, offset: 0xFE4 */ member
20206 __I uint32_t INT_ENABLE; /**< Interrupt Enable Register, offset: 0x3E4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S14/ |
| D | LPC55S14.h | 8496 __I uint32_t INT_ENABLE; /**< Interrupt enable bits, offset: 0xFE4 */ member
20205 __I uint32_t INT_ENABLE; /**< Interrupt Enable Register, offset: 0x3E4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC5502/ |
| D | LPC5502.h | 7683 __I uint32_t INT_ENABLE; /**< Interrupt enable bits, offset: 0xFE4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC5502CPXXXX/ |
| D | LPC5502CPXXXX.h | 7638 __I uint32_t INT_ENABLE; /**< Interrupt enable bits, offset: 0xFE4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC5504CPXXXX/ |
| D | LPC5504CPXXXX.h | 7638 __I uint32_t INT_ENABLE; /**< Interrupt enable bits, offset: 0xFE4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC5504/ |
| D | LPC5504.h | 7683 __I uint32_t INT_ENABLE; /**< Interrupt enable bits, offset: 0xFE4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC5506/ |
| D | LPC5506.h | 7683 __I uint32_t INT_ENABLE; /**< Interrupt enable bits, offset: 0xFE4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC5506CPXXXX/ |
| D | LPC5506CPXXXX.h | 7638 __I uint32_t INT_ENABLE; /**< Interrupt enable bits, offset: 0xFE4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC5526/ |
| D | LPC5526.h | 7123 __I uint32_t INT_ENABLE; /**< Interrupt enable bits, offset: 0xFE4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC5528/ |
| D | LPC5528.h | 7122 __I uint32_t INT_ENABLE; /**< Interrupt enable bits, offset: 0xFE4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC5512/ |
| D | LPC5512.h | 8113 __I uint32_t INT_ENABLE; /**< Interrupt enable bits, offset: 0xFE4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S26/ |
| D | LPC55S26.h | 7505 __I uint32_t INT_ENABLE; /**< Interrupt enable bits, offset: 0xFE4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S28/ |
| D | LPC55S28.h | 7504 __I uint32_t INT_ENABLE; /**< Interrupt enable bits, offset: 0xFE4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC5514/ |
| D | LPC5514.h | 8114 __I uint32_t INT_ENABLE; /**< Interrupt enable bits, offset: 0xFE4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC5516/ |
| D | LPC5516.h | 8115 __I uint32_t INT_ENABLE; /**< Interrupt enable bits, offset: 0xFE4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S66/ |
| D | LPC55S66_cm33_core1.h | 7505 __I uint32_t INT_ENABLE; /**< Interrupt enable bits, offset: 0xFE4 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S69/ |
| D | LPC55S69_cm33_core1.h | 7504 __I uint32_t INT_ENABLE; /**< Interrupt enable bits, offset: 0xFE4 */ member
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| D | LPC55S69_cm33_core0.h | 7504 __I uint32_t INT_ENABLE; /**< Interrupt enable bits, offset: 0xFE4 */ member
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