Searched refs:INTENA (Results 1 – 15 of 15) sorted by relevance
| /hal_nxp-latest/mcux/mcux-sdk/drivers/lpc_gpio/ |
| D | fsl_gpio.c | 157 base->INTENA[port] = base->INTENA[port] | mask; in GPIO_PortEnableInterrupts() 181 base->INTENA[port] = base->INTENA[port] & ~mask; in GPIO_PortDisableInterrupts() 257 base->INTENA[port] = base->INTENA[port] | (1UL << pin); in GPIO_PinEnableInterrupt() 281 base->INTENA[port] = base->INTENA[port] & ~(1UL << pin); in GPIO_PinDisableInterrupt()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/ |
| D | MIMXRT685S_dsp.h | 8250 …__IO uint32_t INTENA[8]; /**< interrupt A enable control register, array o… member
|
| D | MIMXRT685S_cm33.h | 14270 …__IO uint32_t INTENA[8]; /**< interrupt A enable control register, array o… member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/ |
| D | MIMXRT633S.h | 14270 …__IO uint32_t INTENA[8]; /**< interrupt A enable control register, array o… member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/ |
| D | MIMXRT595S_dsp.h | 14262 …__IO uint32_t INTENA[8]; /**< Interrupt A enable control, array offset: 0x… member
|
| D | MIMXRT595S_cm33.h | 20927 …__IO uint32_t INTENA[8]; /**< Interrupt A enable control, array offset: 0x… member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC5536/ |
| D | LPC5536.h | 15989 …__IO uint32_t INTENA[4]; /**< Interrupt A enable control, array offset: 0x… member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC5534/ |
| D | LPC5534.h | 15989 …__IO uint32_t INTENA[4]; /**< Interrupt A enable control, array offset: 0x… member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/ |
| D | MIMXRT533S.h | 20923 …__IO uint32_t INTENA[8]; /**< Interrupt A enable control, array offset: 0x… member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/ |
| D | MIMXRT555S.h | 20926 …__IO uint32_t INTENA[8]; /**< Interrupt A enable control, array offset: 0x… member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S36/ |
| D | LPC55S36.h | 15988 …__IO uint32_t INTENA[4]; /**< Interrupt A enable control, array offset: 0x… member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/RW610/ |
| D | RW610.h | 36533 …__IO uint32_t INTENA[2]; /**< Interrupt A enable control, array offset: 0x… member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/RW612/ |
| D | RW612.h | 36533 …__IO uint32_t INTENA[2]; /**< Interrupt A enable control, array offset: 0x… member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX9596/ |
| D | MIMX9596_ca55.h | 425497 __IO uint32_t INTENA; /**< Interrupt Enable For SoC, offset: 0x8 */ member
|
| D | MIMX9596_cm7.h | 452748 __IO uint32_t INTENA; /**< Interrupt Enable For SoC, offset: 0x8 */ member
|