Searched refs:INPUTMUX_DMAC1_ITRIG_ENA0_FLEXSPI1_TX_MASK (Results 1 – 4 of 4) sorted by relevance
24619 #define INPUTMUX_DMAC1_ITRIG_ENA0_FLEXSPI1_TX_MASK (0x4000000U) macro24625 …(x)) << INPUTMUX_DMAC1_ITRIG_ENA0_FLEXSPI1_TX_SHIFT)) & INPUTMUX_DMAC1_ITRIG_ENA0_FLEXSPI1_TX_MASK)
31613 #define INPUTMUX_DMAC1_ITRIG_ENA0_FLEXSPI1_TX_MASK (0x4000000U) macro31619 …(x)) << INPUTMUX_DMAC1_ITRIG_ENA0_FLEXSPI1_TX_SHIFT)) & INPUTMUX_DMAC1_ITRIG_ENA0_FLEXSPI1_TX_MASK)
31609 #define INPUTMUX_DMAC1_ITRIG_ENA0_FLEXSPI1_TX_MASK (0x4000000U) macro31615 …(x)) << INPUTMUX_DMAC1_ITRIG_ENA0_FLEXSPI1_TX_SHIFT)) & INPUTMUX_DMAC1_ITRIG_ENA0_FLEXSPI1_TX_MASK)
31612 #define INPUTMUX_DMAC1_ITRIG_ENA0_FLEXSPI1_TX_MASK (0x4000000U) macro31618 …(x)) << INPUTMUX_DMAC1_ITRIG_ENA0_FLEXSPI1_TX_SHIFT)) & INPUTMUX_DMAC1_ITRIG_ENA0_FLEXSPI1_TX_MASK)
