Searched refs:INPUTMUX_DMAC0_REQ_ENA0_FLEXCOMM5_TX_MASK (Results 1 – 7 of 7) sorted by relevance
12486 #define INPUTMUX_DMAC0_REQ_ENA0_FLEXCOMM5_TX_MASK (0x800U) macro12492 …t)(x)) << INPUTMUX_DMAC0_REQ_ENA0_FLEXCOMM5_TX_SHIFT)) & INPUTMUX_DMAC0_REQ_ENA0_FLEXCOMM5_TX_MASK)
19250 #define INPUTMUX_DMAC0_REQ_ENA0_FLEXCOMM5_TX_MASK (0x800U) macro19256 …t)(x)) << INPUTMUX_DMAC0_REQ_ENA0_FLEXCOMM5_TX_SHIFT)) & INPUTMUX_DMAC0_REQ_ENA0_FLEXCOMM5_TX_MASK)
22015 #define INPUTMUX_DMAC0_REQ_ENA0_FLEXCOMM5_TX_MASK (0x800U) macro22021 …t)(x)) << INPUTMUX_DMAC0_REQ_ENA0_FLEXCOMM5_TX_SHIFT)) & INPUTMUX_DMAC0_REQ_ENA0_FLEXCOMM5_TX_MASK)
29009 #define INPUTMUX_DMAC0_REQ_ENA0_FLEXCOMM5_TX_MASK (0x800U) macro29015 …t)(x)) << INPUTMUX_DMAC0_REQ_ENA0_FLEXCOMM5_TX_SHIFT)) & INPUTMUX_DMAC0_REQ_ENA0_FLEXCOMM5_TX_MASK)
29005 #define INPUTMUX_DMAC0_REQ_ENA0_FLEXCOMM5_TX_MASK (0x800U) macro29011 …t)(x)) << INPUTMUX_DMAC0_REQ_ENA0_FLEXCOMM5_TX_SHIFT)) & INPUTMUX_DMAC0_REQ_ENA0_FLEXCOMM5_TX_MASK)
29008 #define INPUTMUX_DMAC0_REQ_ENA0_FLEXCOMM5_TX_MASK (0x800U) macro29014 …t)(x)) << INPUTMUX_DMAC0_REQ_ENA0_FLEXCOMM5_TX_SHIFT)) & INPUTMUX_DMAC0_REQ_ENA0_FLEXCOMM5_TX_MASK)
