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Searched refs:IMR0 (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/drivers/cns_acomp/
Dfsl_acomp.h418 base->IMR0 &= ~(interruptMask & 0x3UL); in ACOMP_EnableInterrupts()
431 base->IMR0 |= (interruptMask & 0x3UL); in ACOMP_DisableInterrupt()
/hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_INTERRUPT_CONTROL.h86 __IO uint32_t IMR0; /**< Interrupt Mask Register, offset: 0x60 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/RW610/
DRW610.h480 …__IO uint32_t IMR0; /**< ACOMP0 Interrupt Mask Register, offset: 0x20… member
/hal_nxp-latest/mcux/mcux-sdk/devices/RW612/
DRW612.h480 …__IO uint32_t IMR0; /**< ACOMP0 Interrupt Mask Register, offset: 0x20… member