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Searched refs:IMASK1 (Results 1 – 25 of 113) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/drivers/flexcan/
Dfsl_flexcan.h1796 base->IMASK1 |= (uint32_t)(mask & 0xFFFFFFFFU); in FLEXCAN_EnableMbInterrupts()
1799 base->IMASK1 |= mask; in FLEXCAN_EnableMbInterrupts()
1844 base->IMASK1 &= ~((uint32_t)(mask & 0xFFFFFFFFU)); in FLEXCAN_DisableMbInterrupts()
1847 base->IMASK1 &= ~mask; in FLEXCAN_DisableMbInterrupts()
Dfsl_flexcan.c482 u32TempIMASK1 = base->IMASK1; in FLEXCAN_EnterFreezeMode()
501 base->IMASK1 = u32TempIMASK1; in FLEXCAN_EnterFreezeMode()
512 u32TempIMASK1 = base->IMASK1; in FLEXCAN_EnterFreezeMode()
538 base->IMASK1 = u32TempIMASK1; in FLEXCAN_EnterFreezeMode()
576 u32TempIMASK1 = base->IMASK1; in FLEXCAN_EnterFreezeMode()
592 base->IMASK1 = u32TempIMASK1; in FLEXCAN_EnterFreezeMode()
4301 tempmask = (uint64_t)base->IMASK1; in FLEXCAN_CheckUnhandleInterruptEvents()
4567 uint32_t intflag[4] = {(base->IMASK1 & base->IFLAG1), (base->IMASK2 & base->IFLAG2), 0U, 0U}; in FLEXCAN_SubHandlerForDataTransfered()
4575 uint32_t intflag = base->IMASK1 & base->IFLAG1; in FLEXCAN_SubHandlerForDataTransfered()
/hal_nxp-latest/imx/drivers/
Dflexcan.c447 interruptMaskPtr = &base->IMASK1; in FLEXCAN_SetMsgBufIntCmd()
/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K118_FLEXCAN.h88 __IO uint32_t IMASK1; /**< Interrupt Masks 1 Register, offset: 0x28 */ member
DS32K142W_FLEXCAN.h88 __IO uint32_t IMASK1; /**< Interrupt Masks 1 Register, offset: 0x28 */ member
DS32K142_FLEXCAN.h88 __IO uint32_t IMASK1; /**< Interrupt Masks 1 Register, offset: 0x28 */ member
DS32K116_FLEXCAN.h88 __IO uint32_t IMASK1; /**< Interrupt Masks 1 Register, offset: 0x28 */ member
DS32K144W_FLEXCAN.h88 __IO uint32_t IMASK1; /**< Interrupt Masks 1 Register, offset: 0x28 */ member
DS32K144_FLEXCAN.h88 __IO uint32_t IMASK1; /**< Interrupt Masks 1 Register, offset: 0x28 */ member
DS32K146_FLEXCAN.h88 __IO uint32_t IMASK1; /**< Interrupt Masks 1 Register, offset: 0x28 */ member
DS32K148_FLEXCAN.h88 __IO uint32_t IMASK1; /**< Interrupt Masks 1 Register, offset: 0x28 */ member
/hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_FLEXCAN.h88 __IO uint32_t IMASK1; /**< Interrupt Masks 1, offset: 0x28 */ member
/hal_nxp-latest/s32/drivers/s32k3/BaseNXP/header/
DS32K344_FLEXCAN.h88 __IO uint32_t IMASK1; /**< Interrupt Masks 1 Register, offset: 0x28 */ member
/hal_nxp-latest/s32/mcux/devices/S32K344/
DS32K344_device.h31 __IO uint32_t IMASK1; /**< Interrupt Masks 1 Register, offset: 0x28 */ member
/hal_nxp-latest/s32/mcux/devices/S32Z270/
DS32Z270_device.h31 __IO uint32_t IMASK1; /**< Interrupt Masks 1 Register, offset: 0x28 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV11Z7/
DMKV11Z7.h749 __IO uint32_t IMASK1; /**< Interrupt Masks 1 register, offset: 0x28 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/
DMKE18F16.h1621 __IO uint32_t IMASK1; /**< Interrupt Masks 1 register, offset: 0x28 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16F16/
DMKE16F16.h1621 __IO uint32_t IMASK1; /**< Interrupt Masks 1 register, offset: 0x28 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F12/
DMK22F12.h3961 __IO uint32_t IMASK1; /**< Interrupt Masks 1 register, offset: 0x28 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MK24F12/
DMK24F12.h4628 __IO uint32_t IMASK1; /**< Interrupt Masks 1 register, offset: 0x28 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MK63F12/
DMK63F12.h4657 __IO uint32_t IMASK1; /**< Interrupt Masks 1 register, offset: 0x28 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MK64F12/
DMK64F12.h4670 __IO uint32_t IMASK1; /**< Interrupt Masks 1 register, offset: 0x28 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV56F24/
DMKV56F24.h4995 __IO uint32_t IMASK1; /**< Interrupt Masks 1 register, offset: 0x28 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV58F24/
DMKV58F24.h4995 __IO uint32_t IMASK1; /**< Interrupt Masks 1 register, offset: 0x28 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/
DMCXA146.h1907 __IO uint32_t IMASK1; /**< Interrupt Masks 1, offset: 0x28 */ member

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