Searched refs:ICS (Results 1 – 16 of 16) sorted by relevance
20 #define ICS_C2_BDIV_VAL ((ICS->C2 & ICS_C2_BDIV_MASK) >> ICS_C2_BDIV_SHIFT)21 #define ICS_S_CLKST_VAL ((ICS->S & ICS_S_CLKST_MASK) >> ICS_S_CLKST_SHIFT)22 #define ICS_S_IREFST_VAL ((ICS->S & ICS_S_IREFST_MASK) >> ICS_S_IREFST_SHIFT)23 #define ICS_C1_RDIV_VAL ((ICS->C1 & ICS_C1_RDIV_MASK) >> ICS_C1_RDIV_SHIFT)27 #define ICS_C2_LP_VAL ((ICS->C2 & ICS_C2_LP_MASK) >> ICS_C2_LP_SHIFT)382 if ((ICS->C2 & ICS_C2_LP_MASK) != 0U) in CLOCK_GetFllFreq()408 if ((ICS->C1 & ICS_C1_IRCLKEN_MASK) == 0U) in CLOCK_GetInternalRefClkFreq()587 …ICS->C1 = (uint8_t)((ICS->C1 & ~(ICS_C1_IREFS_MASK)) | ICS_C1_IREFS(kICS_FllSrcInternal)); /* IREF… in CLOCK_SetFeiMode()590 …ICS->C1 = (uint8_t)((ICS->C1 & (~ICS_C1_CLKS_MASK)) | ICS_C1_CLKS(kICS_ClkOutSrcFll)); /* CLKS = 0… in CLOCK_SetFeiMode()592 ICS->C2 = (uint8_t)((ICS->C2 & (~ICS_C2_BDIV_MASK)) | ICS_C2_BDIV(bDiv)); in CLOCK_SetFeiMode()[all …]
555 ICS->C2 |= ICS_C2_LP_MASK; in CLOCK_SetLowPowerEnable()559 ICS->C2 &= (uint8_t)(~ICS_C2_LP_MASK); in CLOCK_SetLowPowerEnable()577 …ICS->C1 = (uint8_t)((ICS->C1 & ~(ICS_C1_IRCLKEN_MASK | ICS_C1_IREFSTEN_MASK)) | (uint8_t)enableMod… in CLOCK_SetInternalRefClkConfig()590 ICS->C1 = (uint8_t)((ICS->C1 & ~ICS_C1_RDIV_MASK) | ICS_C1_RDIV(rDiv)); in CLOCK_SetFllExtRefDiv()609 ICS->C4 |= ICS_C4_CME_MASK; in CLOCK_SetOsc0MonitorMode()613 ICS->C4 &= (uint8_t)(~ICS_C4_CME_MASK); in CLOCK_SetOsc0MonitorMode()
553 ICS->C2 |= ICS_C2_LP_MASK; in CLOCK_SetLowPowerEnable()557 ICS->C2 &= (uint8_t)(~ICS_C2_LP_MASK); in CLOCK_SetLowPowerEnable()572 …ICS->C1 = (uint8_t)((ICS->C1 & ~(ICS_C1_IRCLKEN_MASK | ICS_C1_IREFSTEN_MASK)) | (uint8_t)enableMod… in CLOCK_SetInternalRefClkConfig()585 ICS->C1 = (uint8_t)((ICS->C1 & ~ICS_C1_RDIV_MASK) | ICS_C1_RDIV(rdiv)); in CLOCK_SetFllExtRefDiv()604 ICS->C4 |= ICS_C4_CME_MASK; in CLOCK_SetOsc0MonitorMode()608 ICS->C4 &= (uint8_t)(~ICS_C4_CME_MASK); in CLOCK_SetOsc0MonitorMode()
20 #define ICS_C2_BDIV_VAL ((ICS->C2 & ICS_C2_BDIV_MASK) >> ICS_C2_BDIV_SHIFT)21 #define ICS_S_CLKST_VAL ((ICS->S & ICS_S_CLKST_MASK) >> ICS_S_CLKST_SHIFT)22 #define ICS_S_IREFST_VAL ((ICS->S & ICS_S_IREFST_MASK) >> ICS_S_IREFST_SHIFT)23 #define ICS_C1_RDIV_VAL ((ICS->C1 & ICS_C1_RDIV_MASK) >> ICS_C1_RDIV_SHIFT)27 #define ICS_C2_LP_VAL ((ICS->C2 & ICS_C2_LP_MASK) >> ICS_C2_LP_SHIFT)382 if ((ICS->C2 & ICS_C2_LP_MASK) != 0U) in CLOCK_GetFllFreq()408 if ((ICS->C1 & ICS_C1_IRCLKEN_MASK) == 0U) in CLOCK_GetInternalRefClkFreq()583 …ICS->C1 = (uint8_t)((ICS->C1 & ~(ICS_C1_IREFS_MASK)) | ICS_C1_IREFS(kICS_FllSrcInternal)); /* IREF… in CLOCK_SetFeiMode()586 …ICS->C1 = (uint8_t)((ICS->C1 & (~ICS_C1_CLKS_MASK)) | ICS_C1_CLKS(kICS_ClkOutSrcFll)); /* CLKS = 0… in CLOCK_SetFeiMode()588 ICS->C2 = (uint8_t)((ICS->C2 & (~ICS_C2_BDIV_MASK)) | ICS_C2_BDIV(bDiv)); in CLOCK_SetFeiMode()[all …]
532 ICS->C2 |= ICS_C2_LP_MASK; in CLOCK_SetLowPowerEnable()536 ICS->C2 &= (uint8_t)(~ICS_C2_LP_MASK); in CLOCK_SetLowPowerEnable()554 …ICS->C1 = (uint8_t)((ICS->C1 & ~(ICS_C1_IRCLKEN_MASK | ICS_C1_IREFSTEN_MASK)) | (uint8_t)enableMod… in CLOCK_SetInternalRefClkConfig()567 ICS->C1 = (uint8_t)((ICS->C1 & ~ICS_C1_RDIV_MASK) | ICS_C1_RDIV(rdiv)); in CLOCK_SetFllExtRefDiv()586 ICS->C4 |= ICS_C4_CME_MASK; in CLOCK_SetOsc0MonitorMode()590 ICS->C4 &= (uint8_t)(~ICS_C4_CME_MASK); in CLOCK_SetOsc0MonitorMode()
20 #define ICS_C2_BDIV_VAL ((ICS->C2 & ICS_C2_BDIV_MASK) >> ICS_C2_BDIV_SHIFT)21 #define ICS_S_CLKST_VAL ((ICS->S & ICS_S_CLKST_MASK) >> ICS_S_CLKST_SHIFT)22 #define ICS_S_IREFST_VAL ((ICS->S & ICS_S_IREFST_MASK) >> ICS_S_IREFST_SHIFT)23 #define ICS_C1_RDIV_VAL ((ICS->C1 & ICS_C1_RDIV_MASK) >> ICS_C1_RDIV_SHIFT)27 #define ICS_C2_LP_VAL ((ICS->C2 & ICS_C2_LP_MASK) >> ICS_C2_LP_SHIFT)362 if ((ICS->C2 & ICS_C2_LP_MASK) != 0U) in CLOCK_GetFllFreq()388 if ((ICS->C1 & ICS_C1_IRCLKEN_MASK) == 0U) in CLOCK_GetInternalRefClkFreq()563 …ICS->C1 = (uint8_t)((ICS->C1 & ~(ICS_C1_IREFS_MASK)) | ICS_C1_IREFS(kICS_FllSrcInternal)); /* IREF… in CLOCK_SetFeiMode()566 …ICS->C1 = (uint8_t)((ICS->C1 & (~ICS_C1_CLKS_MASK)) | ICS_C1_CLKS(kICS_ClkOutSrcFll)); /* CLKS = 0… in CLOCK_SetFeiMode()568 ICS->C2 = (uint8_t)((ICS->C2 & (~ICS_C2_BDIV_MASK)) | ICS_C2_BDIV(bDiv)); in CLOCK_SetFeiMode()[all …]
521 ICS->C2 |= ICS_C2_LP_MASK; in CLOCK_SetLowPowerEnable()525 ICS->C2 &= (uint8_t)(~ICS_C2_LP_MASK); in CLOCK_SetLowPowerEnable()543 …ICS->C1 = (uint8_t)((ICS->C1 & ~(ICS_C1_IRCLKEN_MASK | ICS_C1_IREFSTEN_MASK)) | (uint8_t)enableMod… in CLOCK_SetInternalRefClkConfig()556 ICS->C1 = (uint8_t)((ICS->C1 & ~ICS_C1_RDIV_MASK) | ICS_C1_RDIV(rdiv)); in CLOCK_SetFllExtRefDiv()575 ICS->C4 |= ICS_C4_CME_MASK; in CLOCK_SetOsc0MonitorMode()579 ICS->C4 &= (uint8_t)(~ICS_C4_CME_MASK); in CLOCK_SetOsc0MonitorMode()
92 Divider = (uint16_t)(0x01U) << (((uint16_t)ICS->C2 & ICS_C2_BDIV_MASK) >> ICS_C2_BDIV_SHIFT); in SystemCoreClockUpdate()94 switch ((ICS->C1 & ICS_C1_CLKS_MASK) >> ICS_C1_CLKS_SHIFT) { in SystemCoreClockUpdate()97 if((ICS->C1 & ICS_C1_IREFS_MASK) != 0x0U) in SystemCoreClockUpdate()104 Temp = ((uint16_t)ICS->C1 & ICS_C1_RDIV_MASK) >> ICS_C1_RDIV_SHIFT; in SystemCoreClockUpdate()
3284 #define ICS ((ICS_Type *)ICS_BASE) macro3288 #define ICS_BASE_PTRS { ICS }
97 Divider = (uint16_t)(0x01U) << (((uint16_t)ICS->C2 & ICS_C2_BDIV_MASK) >> ICS_C2_BDIV_SHIFT); in SystemCoreClockUpdate()99 switch ((ICS->C1 & ICS_C1_CLKS_MASK) >> ICS_C1_CLKS_SHIFT) { in SystemCoreClockUpdate()102 if((ICS->C1 & ICS_C1_IREFS_MASK) != 0x0U) in SystemCoreClockUpdate()109 Temp = ((uint16_t)ICS->C1 & ICS_C1_RDIV_MASK) >> ICS_C1_RDIV_SHIFT; in SystemCoreClockUpdate()
3314 #define ICS ((ICS_Type *)ICS_BASE) macro3318 #define ICS_BASE_PTRS { ICS }
87 Divider = (uint16_t)(0x01U) << (((uint16_t)ICS->C2 & ICS_C2_BDIV_MASK) >> ICS_C2_BDIV_SHIFT); in SystemCoreClockUpdate()89 switch ((ICS->C1 & ICS_C1_CLKS_MASK) >> ICS_C1_CLKS_SHIFT) { in SystemCoreClockUpdate()92 if((ICS->C1 & ICS_C1_IREFS_MASK) != 0x0U) in SystemCoreClockUpdate()99 Temp = ((uint16_t)ICS->C1 & ICS_C1_RDIV_MASK) >> ICS_C1_RDIV_SHIFT; in SystemCoreClockUpdate()
3242 #define ICS ((ICS_Type *)ICS_BASE) macro3246 #define ICS_BASE_PTRS { ICS }
