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Searched refs:I3C_SSTATUS_HDRMATCH_MASK (Results 1 – 25 of 72) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/drivers/i3c/
Dfsl_i3c.h449 kI3C_SlaveHDRCommandMatchFlag = I3C_SSTATUS_HDRMATCH_MASK, /*!< High data rate command match */
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC865/
DLPC865.h4941 #define I3C_SSTATUS_HDRMATCH_MASK (0x10000U) macro
4944 … (((uint32_t)(((uint32_t)(x)) << I3C_SSTATUS_HDRMATCH_SHIFT)) & I3C_SSTATUS_HDRMATCH_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC864/
DLPC864.h4939 #define I3C_SSTATUS_HDRMATCH_MASK (0x10000U) macro
4942 … (((uint32_t)(((uint32_t)(x)) << I3C_SSTATUS_HDRMATCH_SHIFT)) & I3C_SSTATUS_HDRMATCH_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA142/
DMCXA142.h12607 #define I3C_SSTATUS_HDRMATCH_MASK (0x10000U) macro
12613 … (((uint32_t)(((uint32_t)(x)) << I3C_SSTATUS_HDRMATCH_SHIFT)) & I3C_SSTATUS_HDRMATCH_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA143/
DMCXA143.h12607 #define I3C_SSTATUS_HDRMATCH_MASK (0x10000U) macro
12613 … (((uint32_t)(((uint32_t)(x)) << I3C_SSTATUS_HDRMATCH_SHIFT)) & I3C_SSTATUS_HDRMATCH_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA153/
DMCXA153.h12607 #define I3C_SSTATUS_HDRMATCH_MASK (0x10000U) macro
12613 … (((uint32_t)(((uint32_t)(x)) << I3C_SSTATUS_HDRMATCH_SHIFT)) & I3C_SSTATUS_HDRMATCH_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA152/
DMCXA152.h12607 #define I3C_SSTATUS_HDRMATCH_MASK (0x10000U) macro
12613 … (((uint32_t)(((uint32_t)(x)) << I3C_SSTATUS_HDRMATCH_SHIFT)) & I3C_SSTATUS_HDRMATCH_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/
DMCXA146.h15667 #define I3C_SSTATUS_HDRMATCH_MASK (0x10000U) macro
15675 … (((uint32_t)(((uint32_t)(x)) << I3C_SSTATUS_HDRMATCH_SHIFT)) & I3C_SSTATUS_HDRMATCH_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/
DMCXA145.h15667 #define I3C_SSTATUS_HDRMATCH_MASK (0x10000U) macro
15675 … (((uint32_t)(((uint32_t)(x)) << I3C_SSTATUS_HDRMATCH_SHIFT)) & I3C_SSTATUS_HDRMATCH_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/
DMCXA144.h15667 #define I3C_SSTATUS_HDRMATCH_MASK (0x10000U) macro
15675 … (((uint32_t)(((uint32_t)(x)) << I3C_SSTATUS_HDRMATCH_SHIFT)) & I3C_SSTATUS_HDRMATCH_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h10480 #define I3C_SSTATUS_HDRMATCH_MASK (0x10000U) macro
10483 … (((uint32_t)(((uint32_t)(x)) << I3C_SSTATUS_HDRMATCH_SHIFT)) & I3C_SSTATUS_HDRMATCH_MASK)
DMIMXRT685S_cm33.h17225 #define I3C_SSTATUS_HDRMATCH_MASK (0x10000U) macro
17228 … (((uint32_t)(((uint32_t)(x)) << I3C_SSTATUS_HDRMATCH_SHIFT)) & I3C_SSTATUS_HDRMATCH_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/
DMCXA156.h15671 #define I3C_SSTATUS_HDRMATCH_MASK (0x10000U) macro
15679 … (((uint32_t)(((uint32_t)(x)) << I3C_SSTATUS_HDRMATCH_SHIFT)) & I3C_SSTATUS_HDRMATCH_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA154/
DMCXA154.h15671 #define I3C_SSTATUS_HDRMATCH_MASK (0x10000U) macro
15679 … (((uint32_t)(((uint32_t)(x)) << I3C_SSTATUS_HDRMATCH_SHIFT)) & I3C_SSTATUS_HDRMATCH_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA155/
DMCXA155.h15671 #define I3C_SSTATUS_HDRMATCH_MASK (0x10000U) macro
15679 … (((uint32_t)(((uint32_t)(x)) << I3C_SSTATUS_HDRMATCH_SHIFT)) & I3C_SSTATUS_HDRMATCH_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h17225 #define I3C_SSTATUS_HDRMATCH_MASK (0x10000U) macro
17228 … (((uint32_t)(((uint32_t)(x)) << I3C_SSTATUS_HDRMATCH_SHIFT)) & I3C_SSTATUS_HDRMATCH_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h20029 #define I3C_SSTATUS_HDRMATCH_MASK (0x10000U) macro
20032 … (((uint32_t)(((uint32_t)(x)) << I3C_SSTATUS_HDRMATCH_SHIFT)) & I3C_SSTATUS_HDRMATCH_MASK)
DMIMXRT595S_cm33.h26996 #define I3C_SSTATUS_HDRMATCH_MASK (0x10000U) macro
26999 … (((uint32_t)(((uint32_t)(x)) << I3C_SSTATUS_HDRMATCH_SHIFT)) & I3C_SSTATUS_HDRMATCH_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5536/
DLPC5536.h22304 #define I3C_SSTATUS_HDRMATCH_MASK (0x10000U) macro
22310 … (((uint32_t)(((uint32_t)(x)) << I3C_SSTATUS_HDRMATCH_SHIFT)) & I3C_SSTATUS_HDRMATCH_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5534/
DLPC5534.h22304 #define I3C_SSTATUS_HDRMATCH_MASK (0x10000U) macro
22310 … (((uint32_t)(((uint32_t)(x)) << I3C_SSTATUS_HDRMATCH_SHIFT)) & I3C_SSTATUS_HDRMATCH_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h26992 #define I3C_SSTATUS_HDRMATCH_MASK (0x10000U) macro
26995 … (((uint32_t)(((uint32_t)(x)) << I3C_SSTATUS_HDRMATCH_SHIFT)) & I3C_SSTATUS_HDRMATCH_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716A/
DMCXW716A.h16943 #define I3C_SSTATUS_HDRMATCH_MASK (0x10000U) macro
16946 … (((uint32_t)(((uint32_t)(x)) << I3C_SSTATUS_HDRMATCH_SHIFT)) & I3C_SSTATUS_HDRMATCH_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h24818 #define I3C_SSTATUS_HDRMATCH_MASK (0x10000U) macro
24826 … (((uint32_t)(((uint32_t)(x)) << I3C_SSTATUS_HDRMATCH_SHIFT)) & I3C_SSTATUS_HDRMATCH_MASK)
DMIMXRT735S_cm33_core1.h24862 #define I3C_SSTATUS_HDRMATCH_MASK (0x10000U) macro
24870 … (((uint32_t)(((uint32_t)(x)) << I3C_SSTATUS_HDRMATCH_SHIFT)) & I3C_SSTATUS_HDRMATCH_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h26995 #define I3C_SSTATUS_HDRMATCH_MASK (0x10000U) macro
26998 … (((uint32_t)(((uint32_t)(x)) << I3C_SSTATUS_HDRMATCH_SHIFT)) & I3C_SSTATUS_HDRMATCH_MASK)

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