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Searched refs:I3C_SMAPCTRL0_ENA_MASK (Results 1 – 25 of 51) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/LPC865/
DLPC865.h6454 #define I3C_SMAPCTRL0_ENA_MASK (0x1U) macro
6460 … (((uint32_t)(((uint32_t)(x)) << I3C_SMAPCTRL0_ENA_SHIFT)) & I3C_SMAPCTRL0_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC864/
DLPC864.h6452 #define I3C_SMAPCTRL0_ENA_MASK (0x1U) macro
6458 … (((uint32_t)(((uint32_t)(x)) << I3C_SMAPCTRL0_ENA_SHIFT)) & I3C_SMAPCTRL0_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA142/
DMCXA142.h14447 #define I3C_SMAPCTRL0_ENA_MASK (0x1U) macro
14453 … (((uint32_t)(((uint32_t)(x)) << I3C_SMAPCTRL0_ENA_SHIFT)) & I3C_SMAPCTRL0_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA143/
DMCXA143.h14447 #define I3C_SMAPCTRL0_ENA_MASK (0x1U) macro
14453 … (((uint32_t)(((uint32_t)(x)) << I3C_SMAPCTRL0_ENA_SHIFT)) & I3C_SMAPCTRL0_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA153/
DMCXA153.h14447 #define I3C_SMAPCTRL0_ENA_MASK (0x1U) macro
14453 … (((uint32_t)(((uint32_t)(x)) << I3C_SMAPCTRL0_ENA_SHIFT)) & I3C_SMAPCTRL0_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA152/
DMCXA152.h14447 #define I3C_SMAPCTRL0_ENA_MASK (0x1U) macro
14453 … (((uint32_t)(((uint32_t)(x)) << I3C_SMAPCTRL0_ENA_SHIFT)) & I3C_SMAPCTRL0_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/
DMCXA146.h17583 #define I3C_SMAPCTRL0_ENA_MASK (0x1U) macro
17589 … (((uint32_t)(((uint32_t)(x)) << I3C_SMAPCTRL0_ENA_SHIFT)) & I3C_SMAPCTRL0_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/
DMCXA145.h17583 #define I3C_SMAPCTRL0_ENA_MASK (0x1U) macro
17589 … (((uint32_t)(((uint32_t)(x)) << I3C_SMAPCTRL0_ENA_SHIFT)) & I3C_SMAPCTRL0_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/
DMCXA144.h17583 #define I3C_SMAPCTRL0_ENA_MASK (0x1U) macro
17589 … (((uint32_t)(((uint32_t)(x)) << I3C_SMAPCTRL0_ENA_SHIFT)) & I3C_SMAPCTRL0_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/
DMCXA156.h17587 #define I3C_SMAPCTRL0_ENA_MASK (0x1U) macro
17593 … (((uint32_t)(((uint32_t)(x)) << I3C_SMAPCTRL0_ENA_SHIFT)) & I3C_SMAPCTRL0_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA154/
DMCXA154.h17587 #define I3C_SMAPCTRL0_ENA_MASK (0x1U) macro
17593 … (((uint32_t)(((uint32_t)(x)) << I3C_SMAPCTRL0_ENA_SHIFT)) & I3C_SMAPCTRL0_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA155/
DMCXA155.h17587 #define I3C_SMAPCTRL0_ENA_MASK (0x1U) macro
17593 … (((uint32_t)(((uint32_t)(x)) << I3C_SMAPCTRL0_ENA_SHIFT)) & I3C_SMAPCTRL0_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5536/
DLPC5536.h24099 #define I3C_SMAPCTRL0_ENA_MASK (0x1U) macro
24105 … (((uint32_t)(((uint32_t)(x)) << I3C_SMAPCTRL0_ENA_SHIFT)) & I3C_SMAPCTRL0_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5534/
DLPC5534.h24099 #define I3C_SMAPCTRL0_ENA_MASK (0x1U) macro
24105 … (((uint32_t)(((uint32_t)(x)) << I3C_SMAPCTRL0_ENA_SHIFT)) & I3C_SMAPCTRL0_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h26732 #define I3C_SMAPCTRL0_ENA_MASK (0x1U) macro
26738 … (((uint32_t)(((uint32_t)(x)) << I3C_SMAPCTRL0_ENA_SHIFT)) & I3C_SMAPCTRL0_ENA_MASK)
DMIMXRT735S_cm33_core1.h26776 #define I3C_SMAPCTRL0_ENA_MASK (0x1U) macro
26782 … (((uint32_t)(((uint32_t)(x)) << I3C_SMAPCTRL0_ENA_SHIFT)) & I3C_SMAPCTRL0_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S36/
DLPC55S36.h24098 #define I3C_SMAPCTRL0_ENA_MASK (0x1U) macro
24104 … (((uint32_t)(((uint32_t)(x)) << I3C_SMAPCTRL0_ENA_SHIFT)) & I3C_SMAPCTRL0_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h26776 #define I3C_SMAPCTRL0_ENA_MASK (0x1U) macro
26782 … (((uint32_t)(((uint32_t)(x)) << I3C_SMAPCTRL0_ENA_SHIFT)) & I3C_SMAPCTRL0_ENA_MASK)
DMIMXRT758S_hifi1.h26732 #define I3C_SMAPCTRL0_ENA_MASK (0x1U) macro
26738 … (((uint32_t)(((uint32_t)(x)) << I3C_SMAPCTRL0_ENA_SHIFT)) & I3C_SMAPCTRL0_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h26556 #define I3C_SMAPCTRL0_ENA_MASK (0x1U) macro
26562 … (((uint32_t)(((uint32_t)(x)) << I3C_SMAPCTRL0_ENA_SHIFT)) & I3C_SMAPCTRL0_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h26526 #define I3C_SMAPCTRL0_ENA_MASK (0x1U) macro
26532 … (((uint32_t)(((uint32_t)(x)) << I3C_SMAPCTRL0_ENA_SHIFT)) & I3C_SMAPCTRL0_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h26732 #define I3C_SMAPCTRL0_ENA_MASK (0x1U) macro
26738 … (((uint32_t)(((uint32_t)(x)) << I3C_SMAPCTRL0_ENA_SHIFT)) & I3C_SMAPCTRL0_ENA_MASK)
DMIMXRT798S_cm33_core1.h26776 #define I3C_SMAPCTRL0_ENA_MASK (0x1U) macro
26782 … (((uint32_t)(((uint32_t)(x)) << I3C_SMAPCTRL0_ENA_SHIFT)) & I3C_SMAPCTRL0_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW727C/
DMCXW727C_cm33_core0.h21254 #define I3C_SMAPCTRL0_ENA_MASK (0x1U) macro
21260 … (((uint32_t)(((uint32_t)(x)) << I3C_SMAPCTRL0_ENA_SHIFT)) & I3C_SMAPCTRL0_ENA_MASK)
DMCXW727C_cm33_core1.h29566 #define I3C_SMAPCTRL0_ENA_MASK (0x1U) macro
29572 … (((uint32_t)(((uint32_t)(x)) << I3C_SMAPCTRL0_ENA_SHIFT)) & I3C_SMAPCTRL0_ENA_MASK)

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