Home
last modified time | relevance | path

Searched refs:I3C_SIDEXT_BCR_MASK (Results 1 – 25 of 72) sorted by relevance

123

/hal_nxp-latest/mcux/mcux-sdk/drivers/i3c/
Dfsl_i3c.c898 base->SIDEXT &= ~(I3C_SIDEXT_BCR_MASK | I3C_SIDEXT_DCR_MASK); in I3C_Init()
2839 base->SIDEXT &= ~(I3C_SIDEXT_BCR_MASK | I3C_SIDEXT_DCR_MASK); in I3C_SlaveInit()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC865/
DLPC865.h5667 #define I3C_SIDEXT_BCR_MASK (0xFF0000U) macro
5670 … (((uint32_t)(((uint32_t)(x)) << I3C_SIDEXT_BCR_SHIFT)) & I3C_SIDEXT_BCR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC864/
DLPC864.h5665 #define I3C_SIDEXT_BCR_MASK (0xFF0000U) macro
5668 … (((uint32_t)(((uint32_t)(x)) << I3C_SIDEXT_BCR_SHIFT)) & I3C_SIDEXT_BCR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA142/
DMCXA142.h13525 #define I3C_SIDEXT_BCR_MASK (0xFF0000U) macro
13528 … (((uint32_t)(((uint32_t)(x)) << I3C_SIDEXT_BCR_SHIFT)) & I3C_SIDEXT_BCR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA143/
DMCXA143.h13525 #define I3C_SIDEXT_BCR_MASK (0xFF0000U) macro
13528 … (((uint32_t)(((uint32_t)(x)) << I3C_SIDEXT_BCR_SHIFT)) & I3C_SIDEXT_BCR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA153/
DMCXA153.h13525 #define I3C_SIDEXT_BCR_MASK (0xFF0000U) macro
13528 … (((uint32_t)(((uint32_t)(x)) << I3C_SIDEXT_BCR_SHIFT)) & I3C_SIDEXT_BCR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA152/
DMCXA152.h13525 #define I3C_SIDEXT_BCR_MASK (0xFF0000U) macro
13528 … (((uint32_t)(((uint32_t)(x)) << I3C_SIDEXT_BCR_SHIFT)) & I3C_SIDEXT_BCR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/
DMCXA146.h16613 #define I3C_SIDEXT_BCR_MASK (0xFF0000U) macro
16616 … (((uint32_t)(((uint32_t)(x)) << I3C_SIDEXT_BCR_SHIFT)) & I3C_SIDEXT_BCR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/
DMCXA145.h16613 #define I3C_SIDEXT_BCR_MASK (0xFF0000U) macro
16616 … (((uint32_t)(((uint32_t)(x)) << I3C_SIDEXT_BCR_SHIFT)) & I3C_SIDEXT_BCR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/
DMCXA144.h16613 #define I3C_SIDEXT_BCR_MASK (0xFF0000U) macro
16616 … (((uint32_t)(((uint32_t)(x)) << I3C_SIDEXT_BCR_SHIFT)) & I3C_SIDEXT_BCR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h11170 #define I3C_SIDEXT_BCR_MASK (0xFF0000U) macro
11173 … (((uint32_t)(((uint32_t)(x)) << I3C_SIDEXT_BCR_SHIFT)) & I3C_SIDEXT_BCR_MASK)
DMIMXRT685S_cm33.h17915 #define I3C_SIDEXT_BCR_MASK (0xFF0000U) macro
17918 … (((uint32_t)(((uint32_t)(x)) << I3C_SIDEXT_BCR_SHIFT)) & I3C_SIDEXT_BCR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/
DMCXA156.h16617 #define I3C_SIDEXT_BCR_MASK (0xFF0000U) macro
16620 … (((uint32_t)(((uint32_t)(x)) << I3C_SIDEXT_BCR_SHIFT)) & I3C_SIDEXT_BCR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA154/
DMCXA154.h16617 #define I3C_SIDEXT_BCR_MASK (0xFF0000U) macro
16620 … (((uint32_t)(((uint32_t)(x)) << I3C_SIDEXT_BCR_SHIFT)) & I3C_SIDEXT_BCR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA155/
DMCXA155.h16617 #define I3C_SIDEXT_BCR_MASK (0xFF0000U) macro
16620 … (((uint32_t)(((uint32_t)(x)) << I3C_SIDEXT_BCR_SHIFT)) & I3C_SIDEXT_BCR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h17915 #define I3C_SIDEXT_BCR_MASK (0xFF0000U) macro
17918 … (((uint32_t)(((uint32_t)(x)) << I3C_SIDEXT_BCR_SHIFT)) & I3C_SIDEXT_BCR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h20708 #define I3C_SIDEXT_BCR_MASK (0xFF0000U) macro
20711 … (((uint32_t)(((uint32_t)(x)) << I3C_SIDEXT_BCR_SHIFT)) & I3C_SIDEXT_BCR_MASK)
DMIMXRT595S_cm33.h27675 #define I3C_SIDEXT_BCR_MASK (0xFF0000U) macro
27678 … (((uint32_t)(((uint32_t)(x)) << I3C_SIDEXT_BCR_SHIFT)) & I3C_SIDEXT_BCR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5536/
DLPC5536.h23218 #define I3C_SIDEXT_BCR_MASK (0xFF0000U) macro
23221 … (((uint32_t)(((uint32_t)(x)) << I3C_SIDEXT_BCR_SHIFT)) & I3C_SIDEXT_BCR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5534/
DLPC5534.h23218 #define I3C_SIDEXT_BCR_MASK (0xFF0000U) macro
23221 … (((uint32_t)(((uint32_t)(x)) << I3C_SIDEXT_BCR_SHIFT)) & I3C_SIDEXT_BCR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h27671 #define I3C_SIDEXT_BCR_MASK (0xFF0000U) macro
27674 … (((uint32_t)(((uint32_t)(x)) << I3C_SIDEXT_BCR_SHIFT)) & I3C_SIDEXT_BCR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716A/
DMCXW716A.h17624 #define I3C_SIDEXT_BCR_MASK (0xFF0000U) macro
17627 … (((uint32_t)(((uint32_t)(x)) << I3C_SIDEXT_BCR_SHIFT)) & I3C_SIDEXT_BCR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h25762 #define I3C_SIDEXT_BCR_MASK (0xFF0000U) macro
25765 … (((uint32_t)(((uint32_t)(x)) << I3C_SIDEXT_BCR_SHIFT)) & I3C_SIDEXT_BCR_MASK)
DMIMXRT735S_cm33_core1.h25806 #define I3C_SIDEXT_BCR_MASK (0xFF0000U) macro
25809 … (((uint32_t)(((uint32_t)(x)) << I3C_SIDEXT_BCR_SHIFT)) & I3C_SIDEXT_BCR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h27674 #define I3C_SIDEXT_BCR_MASK (0xFF0000U) macro
27677 … (((uint32_t)(((uint32_t)(x)) << I3C_SIDEXT_BCR_SHIFT)) & I3C_SIDEXT_BCR_MASK)

123