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Searched refs:I3C_MINTMASKED_TXNOTFULL_MASK (Results 1 – 25 of 72) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_I3C.h822 #define I3C_MINTMASKED_TXNOTFULL_MASK (0x1000U) macro
825 … (((uint32_t)(((uint32_t)(x)) << I3C_MINTMASKED_TXNOTFULL_SHIFT)) & I3C_MINTMASKED_TXNOTFULL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC865/
DLPC865.h6085 #define I3C_MINTMASKED_TXNOTFULL_MASK (0x1000U) macro
6088 … (((uint32_t)(((uint32_t)(x)) << I3C_MINTMASKED_TXNOTFULL_SHIFT)) & I3C_MINTMASKED_TXNOTFULL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC864/
DLPC864.h6083 #define I3C_MINTMASKED_TXNOTFULL_MASK (0x1000U) macro
6086 … (((uint32_t)(((uint32_t)(x)) << I3C_MINTMASKED_TXNOTFULL_SHIFT)) & I3C_MINTMASKED_TXNOTFULL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA142/
DMCXA142.h13984 #define I3C_MINTMASKED_TXNOTFULL_MASK (0x1000U) macro
13990 … (((uint32_t)(((uint32_t)(x)) << I3C_MINTMASKED_TXNOTFULL_SHIFT)) & I3C_MINTMASKED_TXNOTFULL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA143/
DMCXA143.h13984 #define I3C_MINTMASKED_TXNOTFULL_MASK (0x1000U) macro
13990 … (((uint32_t)(((uint32_t)(x)) << I3C_MINTMASKED_TXNOTFULL_SHIFT)) & I3C_MINTMASKED_TXNOTFULL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA153/
DMCXA153.h13984 #define I3C_MINTMASKED_TXNOTFULL_MASK (0x1000U) macro
13990 … (((uint32_t)(((uint32_t)(x)) << I3C_MINTMASKED_TXNOTFULL_SHIFT)) & I3C_MINTMASKED_TXNOTFULL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA152/
DMCXA152.h13984 #define I3C_MINTMASKED_TXNOTFULL_MASK (0x1000U) macro
13990 … (((uint32_t)(((uint32_t)(x)) << I3C_MINTMASKED_TXNOTFULL_SHIFT)) & I3C_MINTMASKED_TXNOTFULL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/
DMCXA146.h17098 #define I3C_MINTMASKED_TXNOTFULL_MASK (0x1000U) macro
17104 … (((uint32_t)(((uint32_t)(x)) << I3C_MINTMASKED_TXNOTFULL_SHIFT)) & I3C_MINTMASKED_TXNOTFULL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/
DMCXA145.h17098 #define I3C_MINTMASKED_TXNOTFULL_MASK (0x1000U) macro
17104 … (((uint32_t)(((uint32_t)(x)) << I3C_MINTMASKED_TXNOTFULL_SHIFT)) & I3C_MINTMASKED_TXNOTFULL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/
DMCXA144.h17098 #define I3C_MINTMASKED_TXNOTFULL_MASK (0x1000U) macro
17104 … (((uint32_t)(((uint32_t)(x)) << I3C_MINTMASKED_TXNOTFULL_SHIFT)) & I3C_MINTMASKED_TXNOTFULL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h11532 #define I3C_MINTMASKED_TXNOTFULL_MASK (0x1000U) macro
11535 … (((uint32_t)(((uint32_t)(x)) << I3C_MINTMASKED_TXNOTFULL_SHIFT)) & I3C_MINTMASKED_TXNOTFULL_MASK)
DMIMXRT685S_cm33.h18277 #define I3C_MINTMASKED_TXNOTFULL_MASK (0x1000U) macro
18280 … (((uint32_t)(((uint32_t)(x)) << I3C_MINTMASKED_TXNOTFULL_SHIFT)) & I3C_MINTMASKED_TXNOTFULL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/
DMCXA156.h17102 #define I3C_MINTMASKED_TXNOTFULL_MASK (0x1000U) macro
17108 … (((uint32_t)(((uint32_t)(x)) << I3C_MINTMASKED_TXNOTFULL_SHIFT)) & I3C_MINTMASKED_TXNOTFULL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA154/
DMCXA154.h17102 #define I3C_MINTMASKED_TXNOTFULL_MASK (0x1000U) macro
17108 … (((uint32_t)(((uint32_t)(x)) << I3C_MINTMASKED_TXNOTFULL_SHIFT)) & I3C_MINTMASKED_TXNOTFULL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA155/
DMCXA155.h17102 #define I3C_MINTMASKED_TXNOTFULL_MASK (0x1000U) macro
17108 … (((uint32_t)(((uint32_t)(x)) << I3C_MINTMASKED_TXNOTFULL_SHIFT)) & I3C_MINTMASKED_TXNOTFULL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h18277 #define I3C_MINTMASKED_TXNOTFULL_MASK (0x1000U) macro
18280 … (((uint32_t)(((uint32_t)(x)) << I3C_MINTMASKED_TXNOTFULL_SHIFT)) & I3C_MINTMASKED_TXNOTFULL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h21048 #define I3C_MINTMASKED_TXNOTFULL_MASK (0x1000U) macro
21051 … (((uint32_t)(((uint32_t)(x)) << I3C_MINTMASKED_TXNOTFULL_SHIFT)) & I3C_MINTMASKED_TXNOTFULL_MASK)
DMIMXRT595S_cm33.h28015 #define I3C_MINTMASKED_TXNOTFULL_MASK (0x1000U) macro
28018 … (((uint32_t)(((uint32_t)(x)) << I3C_MINTMASKED_TXNOTFULL_SHIFT)) & I3C_MINTMASKED_TXNOTFULL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5536/
DLPC5536.h23653 #define I3C_MINTMASKED_TXNOTFULL_MASK (0x1000U) macro
23659 … (((uint32_t)(((uint32_t)(x)) << I3C_MINTMASKED_TXNOTFULL_SHIFT)) & I3C_MINTMASKED_TXNOTFULL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5534/
DLPC5534.h23653 #define I3C_MINTMASKED_TXNOTFULL_MASK (0x1000U) macro
23659 … (((uint32_t)(((uint32_t)(x)) << I3C_MINTMASKED_TXNOTFULL_SHIFT)) & I3C_MINTMASKED_TXNOTFULL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h28011 #define I3C_MINTMASKED_TXNOTFULL_MASK (0x1000U) macro
28014 … (((uint32_t)(((uint32_t)(x)) << I3C_MINTMASKED_TXNOTFULL_SHIFT)) & I3C_MINTMASKED_TXNOTFULL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716A/
DMCXW716A.h17964 #define I3C_MINTMASKED_TXNOTFULL_MASK (0x1000U) macro
17967 … (((uint32_t)(((uint32_t)(x)) << I3C_MINTMASKED_TXNOTFULL_SHIFT)) & I3C_MINTMASKED_TXNOTFULL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h26247 #define I3C_MINTMASKED_TXNOTFULL_MASK (0x1000U) macro
26253 … (((uint32_t)(((uint32_t)(x)) << I3C_MINTMASKED_TXNOTFULL_SHIFT)) & I3C_MINTMASKED_TXNOTFULL_MASK)
DMIMXRT735S_cm33_core1.h26291 #define I3C_MINTMASKED_TXNOTFULL_MASK (0x1000U) macro
26297 … (((uint32_t)(((uint32_t)(x)) << I3C_MINTMASKED_TXNOTFULL_SHIFT)) & I3C_MINTMASKED_TXNOTFULL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h28014 #define I3C_MINTMASKED_TXNOTFULL_MASK (0x1000U) macro
28017 … (((uint32_t)(((uint32_t)(x)) << I3C_MINTMASKED_TXNOTFULL_SHIFT)) & I3C_MINTMASKED_TXNOTFULL_MASK)

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