Home
last modified time | relevance | path

Searched refs:I3C0_BASE (Results 1 – 25 of 50) sorted by relevance

12

/hal_nxp-latest/s32/mcux/devices/S32Z270/
DS32Z270_glue_mcux.h26 #define I3C0_BASE IP_I3C_0_BASE macro
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC865/
DLPC865.h6497 #define I3C0_BASE (0x40060000u) macro
6499 #define I3C0 ((I3C_Type *)I3C0_BASE)
6501 #define I3C_BASE_ADDRS { I3C0_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC864/
DLPC864.h6495 #define I3C0_BASE (0x40060000u) macro
6497 #define I3C0 ((I3C_Type *)I3C0_BASE)
6499 #define I3C_BASE_ADDRS { I3C0_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5536/
DLPC5536.h24197 #define I3C0_BASE (0x50016000u) macro
24201 #define I3C0 ((I3C_Type *)I3C0_BASE)
24205 #define I3C_BASE_ADDRS { I3C0_BASE }
24214 #define I3C0_BASE (0x40016000u) macro
24216 #define I3C0 ((I3C_Type *)I3C0_BASE)
24218 #define I3C_BASE_ADDRS { I3C0_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5534/
DLPC5534.h24197 #define I3C0_BASE (0x50016000u) macro
24201 #define I3C0 ((I3C_Type *)I3C0_BASE)
24205 #define I3C_BASE_ADDRS { I3C0_BASE }
24214 #define I3C0_BASE (0x40016000u) macro
24216 #define I3C0 ((I3C_Type *)I3C0_BASE)
24218 #define I3C_BASE_ADDRS { I3C0_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h28392 #define I3C0_BASE (0x50036000u) macro
28396 #define I3C0 ((I3C_Type *)I3C0_BASE)
28408 #define I3C_BASE_ADDRS { I3C0_BASE, I3C1_BASE }
28417 #define I3C0_BASE (0x40036000u) macro
28419 #define I3C0 ((I3C_Type *)I3C0_BASE)
28425 #define I3C_BASE_ADDRS { I3C0_BASE, I3C1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA142/
DMCXA142.h14544 #define I3C0_BASE (0x40002000u) macro
14546 #define I3C0 ((I3C_Type *)I3C0_BASE)
14548 #define I3C_BASE_ADDRS { I3C0_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA143/
DMCXA143.h14544 #define I3C0_BASE (0x40002000u) macro
14546 #define I3C0 ((I3C_Type *)I3C0_BASE)
14548 #define I3C_BASE_ADDRS { I3C0_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA153/
DMCXA153.h14544 #define I3C0_BASE (0x40002000u) macro
14546 #define I3C0 ((I3C_Type *)I3C0_BASE)
14548 #define I3C_BASE_ADDRS { I3C0_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA152/
DMCXA152.h14544 #define I3C0_BASE (0x40002000u) macro
14546 #define I3C0 ((I3C_Type *)I3C0_BASE)
14548 #define I3C_BASE_ADDRS { I3C0_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_cm33.h28396 #define I3C0_BASE (0x50036000u) macro
28400 #define I3C0 ((I3C_Type *)I3C0_BASE)
28412 #define I3C_BASE_ADDRS { I3C0_BASE, I3C1_BASE }
28421 #define I3C0_BASE (0x40036000u) macro
28423 #define I3C0 ((I3C_Type *)I3C0_BASE)
28429 #define I3C_BASE_ADDRS { I3C0_BASE, I3C1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h28395 #define I3C0_BASE (0x50036000u) macro
28399 #define I3C0 ((I3C_Type *)I3C0_BASE)
28411 #define I3C_BASE_ADDRS { I3C0_BASE, I3C1_BASE }
28420 #define I3C0_BASE (0x40036000u) macro
28422 #define I3C0 ((I3C_Type *)I3C0_BASE)
28428 #define I3C_BASE_ADDRS { I3C0_BASE, I3C1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S36/
DLPC55S36.h24196 #define I3C0_BASE (0x50016000u) macro
24200 #define I3C0 ((I3C_Type *)I3C0_BASE)
24204 #define I3C_BASE_ADDRS { I3C0_BASE }
24213 #define I3C0_BASE (0x40016000u) macro
24215 #define I3C0 ((I3C_Type *)I3C0_BASE)
24217 #define I3C_BASE_ADDRS { I3C0_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/
DMCXA146.h17679 #define I3C0_BASE (0x40002000u) macro
17681 #define I3C0 ((I3C_Type *)I3C0_BASE)
17683 #define I3C_BASE_ADDRS { I3C0_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/
DMCXA145.h17679 #define I3C0_BASE (0x40002000u) macro
17681 #define I3C0 ((I3C_Type *)I3C0_BASE)
17683 #define I3C_BASE_ADDRS { I3C0_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/
DMCXA144.h17679 #define I3C0_BASE (0x40002000u) macro
17681 #define I3C0 ((I3C_Type *)I3C0_BASE)
17683 #define I3C_BASE_ADDRS { I3C0_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h26653 #define I3C0_BASE (0x50021000u) macro
26657 #define I3C0 ((I3C_Type *)I3C0_BASE)
26669 #define I3C_BASE_ADDRS { I3C0_BASE, I3C1_BASE }
26678 #define I3C0_BASE (0x40021000u) macro
26680 #define I3C0 ((I3C_Type *)I3C0_BASE)
26686 #define I3C_BASE_ADDRS { I3C0_BASE, I3C1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h26623 #define I3C0_BASE (0x50021000u) macro
26627 #define I3C0 ((I3C_Type *)I3C0_BASE)
26639 #define I3C_BASE_ADDRS { I3C0_BASE, I3C1_BASE }
26648 #define I3C0_BASE (0x40021000u) macro
26650 #define I3C0 ((I3C_Type *)I3C0_BASE)
26656 #define I3C_BASE_ADDRS { I3C0_BASE, I3C1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW727C/
DMCXW727C_cm33_core0.h21351 #define I3C0_BASE (0x50035000u) macro
21355 #define I3C0 ((I3C_Type *)I3C0_BASE)
21359 #define I3C_BASE_ADDRS { I3C0_BASE }
21368 #define I3C0_BASE (0x40035000u) macro
21370 #define I3C0 ((I3C_Type *)I3C0_BASE)
21372 #define I3C_BASE_ADDRS { I3C0_BASE }
DMCXW727C_cm33_core1.h29663 #define I3C0_BASE (0xB91B5000u) macro
29667 #define I3C0 ((I3C_Type *)I3C0_BASE)
29671 #define I3C_BASE_ADDRS { I3C0_BASE }
29680 #define I3C0_BASE (0xA91B5000u) macro
29682 #define I3C0 ((I3C_Type *)I3C0_BASE)
29684 #define I3C_BASE_ADDRS { I3C0_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/
DMCXA156.h17683 #define I3C0_BASE (0x40002000u) macro
17685 #define I3C0 ((I3C_Type *)I3C0_BASE)
17687 #define I3C_BASE_ADDRS { I3C0_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA154/
DMCXA154.h17683 #define I3C0_BASE (0x40002000u) macro
17685 #define I3C0 ((I3C_Type *)I3C0_BASE)
17687 #define I3C_BASE_ADDRS { I3C0_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA155/
DMCXA155.h17683 #define I3C0_BASE (0x40002000u) macro
17685 #define I3C0 ((I3C_Type *)I3C0_BASE)
17687 #define I3C_BASE_ADDRS { I3C0_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h35481 #define I3C0_BASE (0x50021000u) macro
35485 #define I3C0 ((I3C_Type *)I3C0_BASE)
35497 #define I3C_BASE_ADDRS { I3C0_BASE, I3C1_BASE }
35506 #define I3C0_BASE (0x40021000u) macro
35508 #define I3C0 ((I3C_Type *)I3C0_BASE)
35514 #define I3C_BASE_ADDRS { I3C0_BASE, I3C1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h35481 #define I3C0_BASE (0x50021000u) macro
35485 #define I3C0 ((I3C_Type *)I3C0_BASE)
35497 #define I3C_BASE_ADDRS { I3C0_BASE, I3C1_BASE }
35506 #define I3C0_BASE (0x40021000u) macro
35508 #define I3C0 ((I3C_Type *)I3C0_BASE)
35514 #define I3C_BASE_ADDRS { I3C0_BASE, I3C1_BASE }

12