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Searched refs:I2S_TTSR_TSC_MASK (Results 1 – 25 of 49) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN5/
DMIMX8MN5_cm7.h34320 #define I2S_TTSR_TSC_MASK (0xFFFFFFFFU) macro
34324 … (((uint32_t)(((uint32_t)(x)) << I2S_TTSR_TSC_SHIFT)) & I2S_TTSR_TSC_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN2/
DMIMX8MN2_cm7.h34318 #define I2S_TTSR_TSC_MASK (0xFFFFFFFFU) macro
34322 … (((uint32_t)(((uint32_t)(x)) << I2S_TTSR_TSC_SHIFT)) & I2S_TTSR_TSC_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN4/
DMIMX8MN4_cm7.h34318 #define I2S_TTSR_TSC_MASK (0xFFFFFFFFU) macro
34322 … (((uint32_t)(((uint32_t)(x)) << I2S_TTSR_TSC_SHIFT)) & I2S_TTSR_TSC_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h23871 #define I2S_TTSR_TSC_MASK (0xFFFFFFFFU) macro
23874 … (((uint32_t)(((uint32_t)(x)) << I2S_TTSR_TSC_SHIFT)) & I2S_TTSR_TSC_MASK)
DMIMXRT735S_cm33_core1.h23915 #define I2S_TTSR_TSC_MASK (0xFFFFFFFFU) macro
23918 … (((uint32_t)(((uint32_t)(x)) << I2S_TTSR_TSC_SHIFT)) & I2S_TTSR_TSC_MASK)
DMIMXRT735S_ezhv.h36909 #define I2S_TTSR_TSC_MASK (0xFFFFFFFFU) macro
36912 … (((uint32_t)(((uint32_t)(x)) << I2S_TTSR_TSC_SHIFT)) & I2S_TTSR_TSC_MASK)
DMIMXRT735S_cm33_core0.h36810 #define I2S_TTSR_TSC_MASK (0xFFFFFFFFU) macro
36813 … (((uint32_t)(((uint32_t)(x)) << I2S_TTSR_TSC_SHIFT)) & I2S_TTSR_TSC_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN3/
DMIMX8MN3_cm7.h34320 #define I2S_TTSR_TSC_MASK (0xFFFFFFFFU) macro
34324 … (((uint32_t)(((uint32_t)(x)) << I2S_TTSR_TSC_SHIFT)) & I2S_TTSR_TSC_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN1/
DMIMX8MN1_cm7.h34320 #define I2S_TTSR_TSC_MASK (0xFFFFFFFFU) macro
34324 … (((uint32_t)(((uint32_t)(x)) << I2S_TTSR_TSC_SHIFT)) & I2S_TTSR_TSC_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN6/
DMIMX8MN6_cm7.h34318 #define I2S_TTSR_TSC_MASK (0xFFFFFFFFU) macro
34322 … (((uint32_t)(((uint32_t)(x)) << I2S_TTSR_TSC_SHIFT)) & I2S_TTSR_TSC_MASK)
DMIMX8MN6_ca53.h34346 #define I2S_TTSR_TSC_MASK (0xFFFFFFFFU) macro
34350 … (((uint32_t)(((uint32_t)(x)) << I2S_TTSR_TSC_SHIFT)) & I2S_TTSR_TSC_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h23915 #define I2S_TTSR_TSC_MASK (0xFFFFFFFFU) macro
23918 … (((uint32_t)(((uint32_t)(x)) << I2S_TTSR_TSC_SHIFT)) & I2S_TTSR_TSC_MASK)
DMIMXRT758S_hifi1.h23871 #define I2S_TTSR_TSC_MASK (0xFFFFFFFFU) macro
23874 … (((uint32_t)(((uint32_t)(x)) << I2S_TTSR_TSC_SHIFT)) & I2S_TTSR_TSC_MASK)
DMIMXRT758S_cm33_core0.h36810 #define I2S_TTSR_TSC_MASK (0xFFFFFFFFU) macro
36813 … (((uint32_t)(((uint32_t)(x)) << I2S_TTSR_TSC_SHIFT)) & I2S_TTSR_TSC_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h23871 #define I2S_TTSR_TSC_MASK (0xFFFFFFFFU) macro
23874 … (((uint32_t)(((uint32_t)(x)) << I2S_TTSR_TSC_SHIFT)) & I2S_TTSR_TSC_MASK)
DMIMXRT798S_cm33_core1.h23915 #define I2S_TTSR_TSC_MASK (0xFFFFFFFFU) macro
23918 … (((uint32_t)(((uint32_t)(x)) << I2S_TTSR_TSC_SHIFT)) & I2S_TTSR_TSC_MASK)
DMIMXRT798S_hifi4.h36743 #define I2S_TTSR_TSC_MASK (0xFFFFFFFFU) macro
36746 … (((uint32_t)(((uint32_t)(x)) << I2S_TTSR_TSC_SHIFT)) & I2S_TTSR_TSC_MASK)
DMIMXRT798S_cm33_core0.h36810 #define I2S_TTSR_TSC_MASK (0xFFFFFFFFU) macro
36813 … (((uint32_t)(((uint32_t)(x)) << I2S_TTSR_TSC_SHIFT)) & I2S_TTSR_TSC_MASK)
DMIMXRT798S_ezhv.h36909 #define I2S_TTSR_TSC_MASK (0xFFFFFFFFU) macro
36912 … (((uint32_t)(((uint32_t)(x)) << I2S_TTSR_TSC_SHIFT)) & I2S_TTSR_TSC_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM3/
DMIMX8MM3_cm4.h36474 #define I2S_TTSR_TSC_MASK (0xFFFFFFFFU) macro
36478 … (((uint32_t)(((uint32_t)(x)) << I2S_TTSR_TSC_SHIFT)) & I2S_TTSR_TSC_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM5/
DMIMX8MM5_cm4.h36474 #define I2S_TTSR_TSC_MASK (0xFFFFFFFFU) macro
36478 … (((uint32_t)(((uint32_t)(x)) << I2S_TTSR_TSC_SHIFT)) & I2S_TTSR_TSC_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM6/
DMIMX8MM6_cm4.h36474 #define I2S_TTSR_TSC_MASK (0xFFFFFFFFU) macro
36478 … (((uint32_t)(((uint32_t)(x)) << I2S_TTSR_TSC_SHIFT)) & I2S_TTSR_TSC_MASK)
DMIMX8MM6_ca53.h36497 #define I2S_TTSR_TSC_MASK (0xFFFFFFFFU) macro
36501 … (((uint32_t)(((uint32_t)(x)) << I2S_TTSR_TSC_SHIFT)) & I2S_TTSR_TSC_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM1/
DMIMX8MM1_cm4.h36474 #define I2S_TTSR_TSC_MASK (0xFFFFFFFFU) macro
36478 … (((uint32_t)(((uint32_t)(x)) << I2S_TTSR_TSC_SHIFT)) & I2S_TTSR_TSC_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM2/
DMIMX8MM2_cm4.h36474 #define I2S_TTSR_TSC_MASK (0xFFFFFFFFU) macro
36478 … (((uint32_t)(((uint32_t)(x)) << I2S_TTSR_TSC_SHIFT)) & I2S_TTSR_TSC_MASK)

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