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Searched refs:I2S_TCSR_FR_MASK (Results 1 – 25 of 144) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/drivers/sai/
Dfsl_sai.h194 …kSAI_ResetTypeFIFO = I2S_TCSR_FR_MASK, /*!< FIFO reset, reset the FIFO read and write pointer …
195 kSAI_ResetAll = I2S_TCSR_SR_MASK | I2S_TCSR_FR_MASK /*!< All reset. */
Dfsl_sai_sdma.c545 base->TCSR |= (I2S_TCSR_FR_MASK | I2S_TCSR_SR_MASK); in SAI_TransferAbortSendSDMA()
Dfsl_sai_edma.c879 base->TCSR |= (I2S_TCSR_FR_MASK | I2S_TCSR_SR_MASK); in SAI_TransferAbortSendEDMA()
Dfsl_sai.c463 base->TCSR = I2S_TCSR_SR_MASK | I2S_TCSR_FR_MASK; in SAI_TxReset()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC144/
DMCXC144.h3459 #define I2S_TCSR_FR_MASK (0x2000000U) macro
3465 …) (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FR_SHIFT)) & I2S_TCSR_FR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC143/
DMCXC143.h3459 #define I2S_TCSR_FR_MASK (0x2000000U) macro
3465 …) (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FR_SHIFT)) & I2S_TCSR_FR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC243/
DMCXC243.h3457 #define I2S_TCSR_FR_MASK (0x2000000U) macro
3463 …) (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FR_SHIFT)) & I2S_TCSR_FR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC244/
DMCXC244.h3459 #define I2S_TCSR_FR_MASK (0x2000000U) macro
3465 …) (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FR_SHIFT)) & I2S_TCSR_FR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F12810/
DMK22F12810.h5723 #define I2S_TCSR_FR_MASK (0x2000000U) macro
5729 …) (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FR_SHIFT)) & I2S_TCSR_FR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC444/
DMCXC444.h3459 #define I2S_TCSR_FR_MASK (0x2000000U) macro
3465 …) (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FR_SHIFT)) & I2S_TCSR_FR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC443/
DMCXC443.h3459 #define I2S_TCSR_FR_MASK (0x2000000U) macro
3465 …) (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FR_SHIFT)) & I2S_TCSR_FR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW22D5/
DMKW22D5.h4103 #define I2S_TCSR_FR_MASK (0x2000000U) macro
4105 …) (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FR_SHIFT)) & I2S_TCSR_FR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW24D5/
DMKW24D5.h4103 #define I2S_TCSR_FR_MASK (0x2000000U) macro
4105 …) (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FR_SHIFT)) & I2S_TCSR_FR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F25612/
DMK22F25612.h6490 #define I2S_TCSR_FR_MASK (0x2000000U) macro
6496 …) (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FR_SHIFT)) & I2S_TCSR_FR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F51212/
DMK22F51212.h6746 #define I2S_TCSR_FR_MASK (0x2000000U) macro
6752 …) (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FR_SHIFT)) & I2S_TCSR_FR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F12/
DMK22F12.h10562 #define I2S_TCSR_FR_MASK (0x2000000U) macro
10568 …) (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FR_SHIFT)) & I2S_TCSR_FR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK24F12/
DMK24F12.h13214 #define I2S_TCSR_FR_MASK (0x2000000U) macro
13220 …) (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FR_SHIFT)) & I2S_TCSR_FR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L3A60/
DK32L3A60_cm4.h8135 #define I2S_TCSR_FR_MASK (0x2000000U) macro
8141 …) (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FR_SHIFT)) & I2S_TCSR_FR_MASK)
DK32L3A60_cm0plus.h7291 #define I2S_TCSR_FR_MASK (0x2000000U) macro
7297 …) (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FR_SHIFT)) & I2S_TCSR_FR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK64F12/
DMK64F12.h15045 #define I2S_TCSR_FR_MASK (0x2000000U) macro
15051 …) (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FR_SHIFT)) & I2S_TCSR_FR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK63F12/
DMK63F12.h14999 #define I2S_TCSR_FR_MASK (0x2000000U) macro
15005 …) (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FR_SHIFT)) & I2S_TCSR_FR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK80F25615/
DMK80F25615.h13272 #define I2S_TCSR_FR_MASK (0x2000000U) macro
13278 …) (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FR_SHIFT)) & I2S_TCSR_FR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK82F25615/
DMK82F25615.h13266 #define I2S_TCSR_FR_MASK (0x2000000U) macro
13272 …) (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FR_SHIFT)) & I2S_TCSR_FR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK28FA15/
DMK28FA15.h12713 #define I2S_TCSR_FR_MASK (0x2000000U) macro
12719 …) (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FR_SHIFT)) & I2S_TCSR_FR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK27FA15/
DMK27FA15.h12711 #define I2S_TCSR_FR_MASK (0x2000000U) macro
12717 …) (((uint32_t)(((uint32_t)(x)) << I2S_TCSR_FR_SHIFT)) & I2S_TCSR_FR_MASK)

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