Home
last modified time | relevance | path

Searched refs:I2S_TCR4_FSD_MASK (Results 1 – 25 of 142) sorted by relevance

123456

/hal_nxp-latest/mcux/mcux-sdk/drivers/sai/
Dfsl_sai.h618 base->TCR4 |= I2S_TCR4_FSD_MASK; in SAI_TxSetFrameSyncDirection()
622 base->TCR4 &= ~I2S_TCR4_FSD_MASK; in SAI_TxSetFrameSyncDirection()
Dfsl_sai.c1043 tcr4 &= ~(I2S_TCR4_FSE_MASK | I2S_TCR4_FSP_MASK | I2S_TCR4_FSD_MASK | I2S_TCR4_SYWD_MASK); in SAI_TxSetFrameSyncConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC144/
DMCXC144.h3581 #define I2S_TCR4_FSD_MASK (0x1U) macro
3587 … (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FSD_SHIFT)) & I2S_TCR4_FSD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC143/
DMCXC143.h3581 #define I2S_TCR4_FSD_MASK (0x1U) macro
3587 … (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FSD_SHIFT)) & I2S_TCR4_FSD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC243/
DMCXC243.h3579 #define I2S_TCR4_FSD_MASK (0x1U) macro
3585 … (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FSD_SHIFT)) & I2S_TCR4_FSD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC244/
DMCXC244.h3581 #define I2S_TCR4_FSD_MASK (0x1U) macro
3587 … (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FSD_SHIFT)) & I2S_TCR4_FSD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F12810/
DMK22F12810.h5836 #define I2S_TCR4_FSD_MASK (0x1U) macro
5842 … (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FSD_SHIFT)) & I2S_TCR4_FSD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC444/
DMCXC444.h3581 #define I2S_TCR4_FSD_MASK (0x1U) macro
3587 … (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FSD_SHIFT)) & I2S_TCR4_FSD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC443/
DMCXC443.h3581 #define I2S_TCR4_FSD_MASK (0x1U) macro
3587 … (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FSD_SHIFT)) & I2S_TCR4_FSD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW22D5/
DMKW22D5.h4156 #define I2S_TCR4_FSD_MASK (0x1U) macro
4158 … (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FSD_SHIFT)) & I2S_TCR4_FSD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW24D5/
DMKW24D5.h4156 #define I2S_TCR4_FSD_MASK (0x1U) macro
4158 … (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FSD_SHIFT)) & I2S_TCR4_FSD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F25612/
DMK22F25612.h6603 #define I2S_TCR4_FSD_MASK (0x1U) macro
6609 … (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FSD_SHIFT)) & I2S_TCR4_FSD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F51212/
DMK22F51212.h6859 #define I2S_TCR4_FSD_MASK (0x1U) macro
6865 … (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FSD_SHIFT)) & I2S_TCR4_FSD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F12/
DMK22F12.h10675 #define I2S_TCR4_FSD_MASK (0x1U) macro
10681 … (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FSD_SHIFT)) & I2S_TCR4_FSD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK24F12/
DMK24F12.h13348 #define I2S_TCR4_FSD_MASK (0x1U) macro
13354 … (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FSD_SHIFT)) & I2S_TCR4_FSD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L3A60/
DK32L3A60_cm4.h8268 #define I2S_TCR4_FSD_MASK (0x1U) macro
8274 … (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FSD_SHIFT)) & I2S_TCR4_FSD_MASK)
DK32L3A60_cm0plus.h7424 #define I2S_TCR4_FSD_MASK (0x1U) macro
7430 … (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FSD_SHIFT)) & I2S_TCR4_FSD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK64F12/
DMK64F12.h15179 #define I2S_TCR4_FSD_MASK (0x1U) macro
15185 … (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FSD_SHIFT)) & I2S_TCR4_FSD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK63F12/
DMK63F12.h15133 #define I2S_TCR4_FSD_MASK (0x1U) macro
15139 … (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FSD_SHIFT)) & I2S_TCR4_FSD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK80F25615/
DMK80F25615.h13392 #define I2S_TCR4_FSD_MASK (0x1U) macro
13398 … (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FSD_SHIFT)) & I2S_TCR4_FSD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK82F25615/
DMK82F25615.h13386 #define I2S_TCR4_FSD_MASK (0x1U) macro
13392 … (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FSD_SHIFT)) & I2S_TCR4_FSD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK28FA15/
DMK28FA15.h12831 #define I2S_TCR4_FSD_MASK (0x1U) macro
12837 … (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FSD_SHIFT)) & I2S_TCR4_FSD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK27FA15/
DMK27FA15.h12829 #define I2S_TCR4_FSD_MASK (0x1U) macro
12835 … (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FSD_SHIFT)) & I2S_TCR4_FSD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK26F18/
DMK26F18.h15283 #define I2S_TCR4_FSD_MASK (0x1U) macro
15289 … (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FSD_SHIFT)) & I2S_TCR4_FSD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK65F18/
DMK65F18.h17100 #define I2S_TCR4_FSD_MASK (0x1U) macro
17106 … (((uint32_t)(((uint32_t)(x)) << I2S_TCR4_FSD_SHIFT)) & I2S_TCR4_FSD_MASK)

123456