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Searched refs:I2S_RCR4_FCONT_MASK (Results 1 – 25 of 135) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/drivers/sai/
Dfsl_sai.h1031 base->RCR4 |= I2S_RCR4_FCONT_MASK; in SAI_RxSetFIFOErrorContinue()
1035 base->RCR4 &= ~I2S_RCR4_FCONT_MASK; in SAI_RxSetFIFOErrorContinue()
Dfsl_sai_dma.c209 base->RCR4 |= I2S_RCR4_FCONT_MASK; in SAI_TransferRxCreateHandleDMA()
Dfsl_sai.c1012 rcr4 &= ~I2S_RCR4_FCONT_MASK; in SAI_RxSetFifoConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC144/
DMCXC144.h3958 #define I2S_RCR4_FCONT_MASK (0x10000000U) macro
3964 … (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FCONT_SHIFT)) & I2S_RCR4_FCONT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC143/
DMCXC143.h3958 #define I2S_RCR4_FCONT_MASK (0x10000000U) macro
3964 … (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FCONT_SHIFT)) & I2S_RCR4_FCONT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC243/
DMCXC243.h3956 #define I2S_RCR4_FCONT_MASK (0x10000000U) macro
3962 … (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FCONT_SHIFT)) & I2S_RCR4_FCONT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC244/
DMCXC244.h3958 #define I2S_RCR4_FCONT_MASK (0x10000000U) macro
3964 … (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FCONT_SHIFT)) & I2S_RCR4_FCONT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F12810/
DMK22F12810.h6198 #define I2S_RCR4_FCONT_MASK (0x10000000U) macro
6204 … (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FCONT_SHIFT)) & I2S_RCR4_FCONT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC444/
DMCXC444.h3958 #define I2S_RCR4_FCONT_MASK (0x10000000U) macro
3964 … (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FCONT_SHIFT)) & I2S_RCR4_FCONT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC443/
DMCXC443.h3958 #define I2S_RCR4_FCONT_MASK (0x10000000U) macro
3964 … (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FCONT_SHIFT)) & I2S_RCR4_FCONT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F25612/
DMK22F25612.h6965 #define I2S_RCR4_FCONT_MASK (0x10000000U) macro
6971 … (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FCONT_SHIFT)) & I2S_RCR4_FCONT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F51212/
DMK22F51212.h7221 #define I2S_RCR4_FCONT_MASK (0x10000000U) macro
7227 … (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FCONT_SHIFT)) & I2S_RCR4_FCONT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L3A60/
DK32L3A60_cm4.h8733 #define I2S_RCR4_FCONT_MASK (0x10000000U) macro
8739 … (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FCONT_SHIFT)) & I2S_RCR4_FCONT_MASK)
DK32L3A60_cm0plus.h7889 #define I2S_RCR4_FCONT_MASK (0x10000000U) macro
7895 … (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FCONT_SHIFT)) & I2S_RCR4_FCONT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK80F25615/
DMK80F25615.h13786 #define I2S_RCR4_FCONT_MASK (0x10000000U) macro
13792 … (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FCONT_SHIFT)) & I2S_RCR4_FCONT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK82F25615/
DMK82F25615.h13780 #define I2S_RCR4_FCONT_MASK (0x10000000U) macro
13786 … (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FCONT_SHIFT)) & I2S_RCR4_FCONT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK28FA15/
DMK28FA15.h13223 #define I2S_RCR4_FCONT_MASK (0x10000000U) macro
13229 … (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FCONT_SHIFT)) & I2S_RCR4_FCONT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK27FA15/
DMK27FA15.h13221 #define I2S_RCR4_FCONT_MASK (0x10000000U) macro
13227 … (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FCONT_SHIFT)) & I2S_RCR4_FCONT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK26F18/
DMK26F18.h15759 #define I2S_RCR4_FCONT_MASK (0x10000000U) macro
15765 … (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FCONT_SHIFT)) & I2S_RCR4_FCONT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK65F18/
DMK65F18.h17576 #define I2S_RCR4_FCONT_MASK (0x10000000U) macro
17582 … (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FCONT_SHIFT)) & I2S_RCR4_FCONT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK66F18/
DMK66F18.h17576 #define I2S_RCR4_FCONT_MASK (0x10000000U) macro
17582 … (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FCONT_SHIFT)) & I2S_RCR4_FCONT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h8649 #define I2S_RCR4_FCONT_MASK (0x10000000U) macro
8655 … (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FCONT_SHIFT)) & I2S_RCR4_FCONT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U5/
DMCIMX7U5_cm4.h8650 #define I2S_RCR4_FCONT_MASK (0x10000000U) macro
8656 … (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FCONT_SHIFT)) & I2S_RCR4_FCONT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h16118 #define I2S_RCR4_FCONT_MASK (0x10000000U) macro
16124 … (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FCONT_SHIFT)) & I2S_RCR4_FCONT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h18617 #define I2S_RCR4_FCONT_MASK (0x10000000U) macro
18623 … (((uint32_t)(((uint32_t)(x)) << I2S_RCR4_FCONT_SHIFT)) & I2S_RCR4_FCONT_MASK)

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