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Searched refs:I2S_CFG1_DATAPAUSE_MASK (Results 1 – 25 of 52) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/LPC51U68/
DLPC51U68.h3734 #define I2S_CFG1_DATAPAUSE_MASK (0x2U) macro
3747 … (((uint32_t)(((uint32_t)(x)) << I2S_CFG1_DATAPAUSE_SHIFT)) & I2S_CFG1_DATAPAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54114/
DLPC54114_cm0plus.h3938 #define I2S_CFG1_DATAPAUSE_MASK (0x2U) macro
3951 … (((uint32_t)(((uint32_t)(x)) << I2S_CFG1_DATAPAUSE_SHIFT)) & I2S_CFG1_DATAPAUSE_MASK)
DLPC54114_cm4.h3949 #define I2S_CFG1_DATAPAUSE_MASK (0x2U) macro
3962 … (((uint32_t)(((uint32_t)(x)) << I2S_CFG1_DATAPAUSE_SHIFT)) & I2S_CFG1_DATAPAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54113/
DLPC54113.h3950 #define I2S_CFG1_DATAPAUSE_MASK (0x2U) macro
3963 … (((uint32_t)(((uint32_t)(x)) << I2S_CFG1_DATAPAUSE_SHIFT)) & I2S_CFG1_DATAPAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54607/
DLPC54607.h5332 #define I2S_CFG1_DATAPAUSE_MASK (0x2U) macro
5345 … (((uint32_t)(((uint32_t)(x)) << I2S_CFG1_DATAPAUSE_SHIFT)) & I2S_CFG1_DATAPAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S005/
DLPC54S005.h5397 #define I2S_CFG1_DATAPAUSE_MASK (0x2U) macro
5410 … (((uint32_t)(((uint32_t)(x)) << I2S_CFG1_DATAPAUSE_SHIFT)) & I2S_CFG1_DATAPAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54005/
DLPC54005.h4989 #define I2S_CFG1_DATAPAUSE_MASK (0x2U) macro
5002 … (((uint32_t)(((uint32_t)(x)) << I2S_CFG1_DATAPAUSE_SHIFT)) & I2S_CFG1_DATAPAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54605/
DLPC54605.h5335 #define I2S_CFG1_DATAPAUSE_MASK (0x2U) macro
5348 … (((uint32_t)(((uint32_t)(x)) << I2S_CFG1_DATAPAUSE_SHIFT)) & I2S_CFG1_DATAPAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54606/
DLPC54606.h9483 #define I2S_CFG1_DATAPAUSE_MASK (0x2U) macro
9496 … (((uint32_t)(((uint32_t)(x)) << I2S_CFG1_DATAPAUSE_SHIFT)) & I2S_CFG1_DATAPAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54016/
DLPC54016.h8672 #define I2S_CFG1_DATAPAUSE_MASK (0x2U) macro
8685 … (((uint32_t)(((uint32_t)(x)) << I2S_CFG1_DATAPAUSE_SHIFT)) & I2S_CFG1_DATAPAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54616/
DLPC54616.h9558 #define I2S_CFG1_DATAPAUSE_MASK (0x2U) macro
9571 … (((uint32_t)(((uint32_t)(x)) << I2S_CFG1_DATAPAUSE_SHIFT)) & I2S_CFG1_DATAPAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54018M/
DLPC54018M.h9235 #define I2S_CFG1_DATAPAUSE_MASK (0x2U) macro
9248 … (((uint32_t)(((uint32_t)(x)) << I2S_CFG1_DATAPAUSE_SHIFT)) & I2S_CFG1_DATAPAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54628/
DLPC54628.h9554 #define I2S_CFG1_DATAPAUSE_MASK (0x2U) macro
9567 … (((uint32_t)(((uint32_t)(x)) << I2S_CFG1_DATAPAUSE_SHIFT)) & I2S_CFG1_DATAPAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5502/
DLPC5502.h13600 #define I2S_CFG1_DATAPAUSE_MASK (0x2U) macro
13613 … (((uint32_t)(((uint32_t)(x)) << I2S_CFG1_DATAPAUSE_SHIFT)) & I2S_CFG1_DATAPAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5502CPXXXX/
DLPC5502CPXXXX.h13531 #define I2S_CFG1_DATAPAUSE_MASK (0x2U) macro
13544 … (((uint32_t)(((uint32_t)(x)) << I2S_CFG1_DATAPAUSE_SHIFT)) & I2S_CFG1_DATAPAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54618/
DLPC54618.h9556 #define I2S_CFG1_DATAPAUSE_MASK (0x2U) macro
9569 … (((uint32_t)(((uint32_t)(x)) << I2S_CFG1_DATAPAUSE_SHIFT)) & I2S_CFG1_DATAPAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S018/
DLPC54S018.h9643 #define I2S_CFG1_DATAPAUSE_MASK (0x2U) macro
9656 … (((uint32_t)(((uint32_t)(x)) << I2S_CFG1_DATAPAUSE_SHIFT)) & I2S_CFG1_DATAPAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54018/
DLPC54018.h9235 #define I2S_CFG1_DATAPAUSE_MASK (0x2U) macro
9248 … (((uint32_t)(((uint32_t)(x)) << I2S_CFG1_DATAPAUSE_SHIFT)) & I2S_CFG1_DATAPAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S016/
DLPC54S016.h9037 #define I2S_CFG1_DATAPAUSE_MASK (0x2U) macro
9050 … (((uint32_t)(((uint32_t)(x)) << I2S_CFG1_DATAPAUSE_SHIFT)) & I2S_CFG1_DATAPAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5504CPXXXX/
DLPC5504CPXXXX.h13531 #define I2S_CFG1_DATAPAUSE_MASK (0x2U) macro
13544 … (((uint32_t)(((uint32_t)(x)) << I2S_CFG1_DATAPAUSE_SHIFT)) & I2S_CFG1_DATAPAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5504/
DLPC5504.h13600 #define I2S_CFG1_DATAPAUSE_MASK (0x2U) macro
13613 … (((uint32_t)(((uint32_t)(x)) << I2S_CFG1_DATAPAUSE_SHIFT)) & I2S_CFG1_DATAPAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5506/
DLPC5506.h13600 #define I2S_CFG1_DATAPAUSE_MASK (0x2U) macro
13613 … (((uint32_t)(((uint32_t)(x)) << I2S_CFG1_DATAPAUSE_SHIFT)) & I2S_CFG1_DATAPAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5506CPXXXX/
DLPC5506CPXXXX.h13531 #define I2S_CFG1_DATAPAUSE_MASK (0x2U) macro
13544 … (((uint32_t)(((uint32_t)(x)) << I2S_CFG1_DATAPAUSE_SHIFT)) & I2S_CFG1_DATAPAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54608/
DLPC54608.h9479 #define I2S_CFG1_DATAPAUSE_MASK (0x2U) macro
9492 … (((uint32_t)(((uint32_t)(x)) << I2S_CFG1_DATAPAUSE_SHIFT)) & I2S_CFG1_DATAPAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S018M/
DLPC54S018M.h9643 #define I2S_CFG1_DATAPAUSE_MASK (0x2U) macro
9656 … (((uint32_t)(((uint32_t)(x)) << I2S_CFG1_DATAPAUSE_SHIFT)) & I2S_CFG1_DATAPAUSE_MASK)

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