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Searched refs:HYPERRAM_CMD_LUT_SEQ_IDX_REG_WRITE (Results 1 – 1 of 1) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/boards/mimxrt700evk/project_template/
Dboard.c29 #define HYPERRAM_CMD_LUT_SEQ_IDX_REG_WRITE 5 macro
350 flashXfer.seqIndex = HYPERRAM_CMD_LUT_SEQ_IDX_REG_WRITE; in xspi_hyper_ram_write_mcr()
394 [5 * HYPERRAM_CMD_LUT_SEQ_IDX_REG_WRITE] = XSPI_LUT_SEQ(kXSPI_Command_DDR, kXSPI_8PAD, 0x60, in BOARD_Init16bitsPsRam()
396 …[5 * HYPERRAM_CMD_LUT_SEQ_IDX_REG_WRITE + 1] = XSPI_LUT_SEQ(kXSPI_Command_CADDR_DDR, kXSPI_8PAD, 0… in BOARD_Init16bitsPsRam()
398 … [5 * HYPERRAM_CMD_LUT_SEQ_IDX_REG_WRITE + 2] = XSPI_LUT_SEQ(kXSPI_Command_STOP, kXSPI_1PAD, 0x0, in BOARD_Init16bitsPsRam()
426 [5 * HYPERRAM_CMD_LUT_SEQ_IDX_REG_WRITE] = XSPI_LUT_SEQ(kXSPI_Command_DDR, kXSPI_8PAD, 0x60, in BOARD_Init16bitsPsRam()
428 …[5 * HYPERRAM_CMD_LUT_SEQ_IDX_REG_WRITE + 1] = XSPI_LUT_SEQ(kXSPI_Command_CADDR_DDR, kXSPI_8PAD, 0… in BOARD_Init16bitsPsRam()
430 … [5 * HYPERRAM_CMD_LUT_SEQ_IDX_REG_WRITE + 2] = XSPI_LUT_SEQ(kXSPI_Command_STOP, kXSPI_1PAD, 0x0, in BOARD_Init16bitsPsRam()