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Searched refs:HSIO__LPCG_PHYX2_REGS_BASE (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/
DMIMX8QM6_ca53.h30621 #define HSIO__LPCG_PHYX2_REGS_BASE (0x5F0A0000u) macro
30623 … HSIO__LPCG_PHYX2_REGS ((HSIO_LPCG_PHYX2_REGS_Type *)HSIO__LPCG_PHYX2_REGS_BASE)
30625 #define HSIO_LPCG_PHYX2_REGS_BASE_ADDRS { HSIO__LPCG_PHYX2_REGS_BASE }
DMIMX8QM6_dsp.h33456 #define HSIO__LPCG_PHYX2_REGS_BASE (0x5F0A0000u) macro
33458 … HSIO__LPCG_PHYX2_REGS ((HSIO_LPCG_PHYX2_REGS_Type *)HSIO__LPCG_PHYX2_REGS_BASE)
33460 #define HSIO_LPCG_PHYX2_REGS_BASE_ADDRS { HSIO__LPCG_PHYX2_REGS_BASE }
DMIMX8QM6_cm4_core1.h24389 #define HSIO__LPCG_PHYX2_REGS_BASE (0x5F0A0000u) macro
24391 … HSIO__LPCG_PHYX2_REGS ((HSIO_LPCG_PHYX2_REGS_Type *)HSIO__LPCG_PHYX2_REGS_BASE)
24393 #define HSIO_LPCG_PHYX2_REGS_BASE_ADDRS { HSIO__LPCG_PHYX2_REGS_BASE }
DMIMX8QM6_cm4_core0.h24389 #define HSIO__LPCG_PHYX2_REGS_BASE (0x5F0A0000u) macro
24391 … HSIO__LPCG_PHYX2_REGS ((HSIO_LPCG_PHYX2_REGS_Type *)HSIO__LPCG_PHYX2_REGS_BASE)
24393 #define HSIO_LPCG_PHYX2_REGS_BASE_ADDRS { HSIO__LPCG_PHYX2_REGS_BASE }