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Searched refs:HSIO__LPCG_PCIEX2_REGS_BASE (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/
DMIMX8QM6_ca53.h30163 #define HSIO__LPCG_PCIEX2_REGS_BASE (0x5F0C0000u) macro
30165 …SIO__LPCG_PCIEX2_REGS ((HSIO_LPCG_PCIEX2_REGS_Type *)HSIO__LPCG_PCIEX2_REGS_BASE)
30167 #define HSIO_LPCG_PCIEX2_REGS_BASE_ADDRS { HSIO__LPCG_PCIEX2_REGS_BASE }
DMIMX8QM6_dsp.h32998 #define HSIO__LPCG_PCIEX2_REGS_BASE (0x5F0C0000u) macro
33000 …SIO__LPCG_PCIEX2_REGS ((HSIO_LPCG_PCIEX2_REGS_Type *)HSIO__LPCG_PCIEX2_REGS_BASE)
33002 #define HSIO_LPCG_PCIEX2_REGS_BASE_ADDRS { HSIO__LPCG_PCIEX2_REGS_BASE }
DMIMX8QM6_cm4_core1.h24059 #define HSIO__LPCG_PCIEX2_REGS_BASE (0x5F0C0000u) macro
24061 …SIO__LPCG_PCIEX2_REGS ((HSIO_LPCG_PCIEX2_REGS_Type *)HSIO__LPCG_PCIEX2_REGS_BASE)
24063 #define HSIO_LPCG_PCIEX2_REGS_BASE_ADDRS { HSIO__LPCG_PCIEX2_REGS_BASE }
DMIMX8QM6_cm4_core0.h24059 #define HSIO__LPCG_PCIEX2_REGS_BASE (0x5F0C0000u) macro
24061 …SIO__LPCG_PCIEX2_REGS ((HSIO_LPCG_PCIEX2_REGS_Type *)HSIO__LPCG_PCIEX2_REGS_BASE)
24063 #define HSIO_LPCG_PCIEX2_REGS_BASE_ADDRS { HSIO__LPCG_PCIEX2_REGS_BASE }