Searched refs:GTM_gtm_cls0_DPLL_RR2_COUNT (Results 1 – 1 of 1) sorted by relevance
75 #define GTM_gtm_cls0_DPLL_RR2_COUNT 4096u macro1893 …__IO uint32_t DPLL_RR2[GTM_gtm_cls0_DPLL_RR2_COUNT]; /**< DPLL memory RR2, array offset: 0xC000, a…
