Home
last modified time | relevance | path

Searched refs:GPT4_BASE (Results 1 – 25 of 39) sorted by relevance

12

/hal_nxp-latest/imx/devices/MCIMX7D/
Dclock_freq.c53 case GPT4_BASE: in get_gpt_clock_freq()
DMCIMX7D_M4.h20988 #define GPT4_BASE (0x30300000u) macro
20990 #define GPT4 ((GPT_Type *)GPT4_BASE)
20993 #define GPT_BASE_ADDRS { GPT1_BASE, GPT2_BASE, GPT3_BASE, GPT4_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN1/
DMIMX8MN1_cm7.h33540 #define GPT4_BASE (0x30700000u) macro
33542 #define GPT4 ((GPT_Type *)GPT4_BASE)
33552 #define GPT_BASE_ADDRS { 0u, GPT1_BASE, GPT2_BASE, GPT3_BASE, GPT4_BASE, …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN2/
DMIMX8MN2_cm7.h33538 #define GPT4_BASE (0x30700000u) macro
33540 #define GPT4 ((GPT_Type *)GPT4_BASE)
33550 #define GPT_BASE_ADDRS { 0u, GPT1_BASE, GPT2_BASE, GPT3_BASE, GPT4_BASE, …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN6/
DMIMX8MN6_cm7.h33538 #define GPT4_BASE (0x30700000u) macro
33540 #define GPT4 ((GPT_Type *)GPT4_BASE)
33550 #define GPT_BASE_ADDRS { 0u, GPT1_BASE, GPT2_BASE, GPT3_BASE, GPT4_BASE, …
DMIMX8MN6_ca53.h33566 #define GPT4_BASE (0x30700000u) macro
33568 #define GPT4 ((GPT_Type *)GPT4_BASE)
33578 #define GPT_BASE_ADDRS { 0u, GPT1_BASE, GPT2_BASE, GPT3_BASE, GPT4_BASE, …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN3/
DMIMX8MN3_cm7.h33540 #define GPT4_BASE (0x30700000u) macro
33542 #define GPT4 ((GPT_Type *)GPT4_BASE)
33552 #define GPT_BASE_ADDRS { 0u, GPT1_BASE, GPT2_BASE, GPT3_BASE, GPT4_BASE, …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN4/
DMIMX8MN4_cm7.h33538 #define GPT4_BASE (0x30700000u) macro
33540 #define GPT4 ((GPT_Type *)GPT4_BASE)
33550 #define GPT_BASE_ADDRS { 0u, GPT1_BASE, GPT2_BASE, GPT3_BASE, GPT4_BASE, …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ5/
DMIMX8MQ5_cm4.h31096 #define GPT4_BASE (0x30700000u) macro
31098 #define GPT4 ((GPT_Type *)GPT4_BASE)
31108 #define GPT_BASE_ADDRS { 0u, GPT1_BASE, GPT2_BASE, GPT3_BASE, GPT4_BASE, …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN5/
DMIMX8MN5_cm7.h33540 #define GPT4_BASE (0x30700000u) macro
33542 #define GPT4 ((GPT_Type *)GPT4_BASE)
33552 #define GPT_BASE_ADDRS { 0u, GPT1_BASE, GPT2_BASE, GPT3_BASE, GPT4_BASE, …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ6/
DMIMX8MQ6_cm4.h31096 #define GPT4_BASE (0x30700000u) macro
31098 #define GPT4 ((GPT_Type *)GPT4_BASE)
31108 #define GPT_BASE_ADDRS { 0u, GPT1_BASE, GPT2_BASE, GPT3_BASE, GPT4_BASE, …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ7/
DMIMX8MQ7_cm4.h31096 #define GPT4_BASE (0x30700000u) macro
31098 #define GPT4 ((GPT_Type *)GPT4_BASE)
31108 #define GPT_BASE_ADDRS { 0u, GPT1_BASE, GPT2_BASE, GPT3_BASE, GPT4_BASE, …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD7/
DMIMX8MD7_cm4.h31096 #define GPT4_BASE (0x30700000u) macro
31098 #define GPT4 ((GPT_Type *)GPT4_BASE)
31108 #define GPT_BASE_ADDRS { 0u, GPT1_BASE, GPT2_BASE, GPT3_BASE, GPT4_BASE, …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD6/
DMIMX8MD6_cm4.h31096 #define GPT4_BASE (0x30700000u) macro
31098 #define GPT4 ((GPT_Type *)GPT4_BASE)
31108 #define GPT_BASE_ADDRS { 0u, GPT1_BASE, GPT2_BASE, GPT3_BASE, GPT4_BASE, …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm4.h40848 #define GPT4_BASE (0x400F8000u) macro
40850 #define GPT4 ((GPT_Type *)GPT4_BASE)
40860 #define GPT_BASE_ADDRS { 0u, GPT1_BASE, GPT2_BASE, GPT3_BASE, GPT4_BASE, …
DMIMXRT1165_cm7.h40851 #define GPT4_BASE (0x400F8000u) macro
40853 #define GPT4 ((GPT_Type *)GPT4_BASE)
40863 #define GPT_BASE_ADDRS { 0u, GPT1_BASE, GPT2_BASE, GPT3_BASE, GPT4_BASE, …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h41327 #define GPT4_BASE (0x400F8000u) macro
41329 #define GPT4 ((GPT_Type *)GPT4_BASE)
41339 #define GPT_BASE_ADDRS { 0u, GPT1_BASE, GPT2_BASE, GPT3_BASE, GPT4_BASE, …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm4.h41324 #define GPT4_BASE (0x400F8000u) macro
41326 #define GPT4 ((GPT_Type *)GPT4_BASE)
41336 #define GPT_BASE_ADDRS { 0u, GPT1_BASE, GPT2_BASE, GPT3_BASE, GPT4_BASE, …
DMIMXRT1175_cm7.h41327 #define GPT4_BASE (0x400F8000u) macro
41329 #define GPT4 ((GPT_Type *)GPT4_BASE)
41339 #define GPT_BASE_ADDRS { 0u, GPT1_BASE, GPT2_BASE, GPT3_BASE, GPT4_BASE, …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM1/
DMIMX8MM1_cm4.h35690 #define GPT4_BASE (0x30700000u) macro
35692 #define GPT4 ((GPT_Type *)GPT4_BASE)
35702 #define GPT_BASE_ADDRS { 0u, GPT1_BASE, GPT2_BASE, GPT3_BASE, GPT4_BASE, …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM2/
DMIMX8MM2_cm4.h35690 #define GPT4_BASE (0x30700000u) macro
35692 #define GPT4 ((GPT_Type *)GPT4_BASE)
35702 #define GPT_BASE_ADDRS { 0u, GPT1_BASE, GPT2_BASE, GPT3_BASE, GPT4_BASE, …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm7.h43329 #define GPT4_BASE (0x400F8000u) macro
43331 #define GPT4 ((GPT_Type *)GPT4_BASE)
43341 #define GPT_BASE_ADDRS { 0u, GPT1_BASE, GPT2_BASE, GPT3_BASE, GPT4_BASE, …
DMIMXRT1173_cm4.h43326 #define GPT4_BASE (0x400F8000u) macro
43328 #define GPT4 ((GPT_Type *)GPT4_BASE)
43338 #define GPT_BASE_ADDRS { 0u, GPT1_BASE, GPT2_BASE, GPT3_BASE, GPT4_BASE, …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM6/
DMIMX8MM6_cm4.h35690 #define GPT4_BASE (0x30700000u) macro
35692 #define GPT4 ((GPT_Type *)GPT4_BASE)
35702 #define GPT_BASE_ADDRS { 0u, GPT1_BASE, GPT2_BASE, GPT3_BASE, GPT4_BASE, …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm7.h42856 #define GPT4_BASE (0x400F8000u) macro
42858 #define GPT4 ((GPT_Type *)GPT4_BASE)
42868 #define GPT_BASE_ADDRS { 0u, GPT1_BASE, GPT2_BASE, GPT3_BASE, GPT4_BASE, …

12