| /hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1171/ |
| D | fsl_pm_device.h | 627 #define PM_WSID_GPT2_IRQ PM_ENCODE_WAKEUP_SOURCE_ID(GPT2_IRQn) /*!< GP…
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| /hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1172/ |
| D | fsl_pm_device.h | 627 #define PM_WSID_GPT2_IRQ PM_ENCODE_WAKEUP_SOURCE_ID(GPT2_IRQn) /*!< GP…
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| /hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1173/ |
| D | fsl_pm_device.h | 627 #define PM_WSID_GPT2_IRQ PM_ENCODE_WAKEUP_SOURCE_ID(GPT2_IRQn) /*!< GP…
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| /hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1176/ |
| D | fsl_pm_device.h | 627 #define PM_WSID_GPT2_IRQ PM_ENCODE_WAKEUP_SOURCE_ID(GPT2_IRQn) /*!< GP…
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| /hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1175/ |
| D | fsl_pm_device.h | 627 #define PM_WSID_GPT2_IRQ PM_ENCODE_WAKEUP_SOURCE_ID(GPT2_IRQn) /*!< GP…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1011/ |
| D | MIMXRT1011.h | 117 GPT2_IRQn = 31, /**< GPT2 interrupt */ enumerator 15323 #define GPT_IRQS { NotAvail_IRQn, GPT1_IRQn, GPT2_IRQn }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1015/ |
| D | MIMXRT1015.h | 191 GPT2_IRQn = 101, /**< GPT2 interrupt */ enumerator 17822 #define GPT_IRQS { NotAvail_IRQn, GPT1_IRQn, GPT2_IRQn }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/ |
| D | MIMXRT1024.h | 185 GPT2_IRQn = 101, /**< GPT2 interrupt */ enumerator 21141 #define GPT_IRQS { NotAvail_IRQn, GPT1_IRQn, GPT2_IRQn }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/ |
| D | MIMXRT1021.h | 193 GPT2_IRQn = 101, /**< GPT2 interrupt */ enumerator 21161 #define GPT_IRQS { NotAvail_IRQn, GPT1_IRQn, GPT2_IRQn }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/ |
| D | MIMXRT1051.h | 195 GPT2_IRQn = 101, /**< GPT2 interrupt */ enumerator 22102 #define GPT_IRQS { NotAvail_IRQn, GPT1_IRQn, GPT2_IRQn }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/ |
| D | MIMXRT1041.h | 183 GPT2_IRQn = 101, /**< GPT2 interrupt */ enumerator 23367 #define GPT_IRQS { NotAvail_IRQn, GPT1_IRQn, GPT2_IRQn }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/ |
| D | MIMXRT1052.h | 195 GPT2_IRQn = 101, /**< GPT2 interrupt */ enumerator 22887 #define GPT_IRQS { NotAvail_IRQn, GPT1_IRQn, GPT2_IRQn }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/ |
| D | MIMXRT1042.h | 183 GPT2_IRQn = 101, /**< GPT2 interrupt */ enumerator 23369 #define GPT_IRQS { NotAvail_IRQn, GPT1_IRQn, GPT2_IRQn }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/ |
| D | MIMXRT1061.h | 198 GPT2_IRQn = 101, /**< GPT2 interrupt */ enumerator 23748 #define GPT_IRQS { NotAvail_IRQn, GPT1_IRQn, GPT2_IRQn }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN5/ |
| D | MIMX8MN5_cm7.h | 138 …GPT2_IRQn = 54, /**< OR of GPT Rollover interrupt line, Input Cap… enumerator 33556 #define GPT_IRQS { NotAvail_IRQn, GPT1_IRQn, GPT2_IRQn, GPT3_IRQn, …
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN2/ |
| D | MIMX8MN2_cm7.h | 136 …GPT2_IRQn = 54, /**< OR of GPT Rollover interrupt line, Input Cap… enumerator 33554 #define GPT_IRQS { NotAvail_IRQn, GPT1_IRQn, GPT2_IRQn, GPT3_IRQn, …
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN4/ |
| D | MIMX8MN4_cm7.h | 136 …GPT2_IRQn = 54, /**< OR of GPT Rollover interrupt line, Input Cap… enumerator 33554 #define GPT_IRQS { NotAvail_IRQn, GPT1_IRQn, GPT2_IRQn, GPT3_IRQn, …
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN3/ |
| D | MIMX8MN3_cm7.h | 138 …GPT2_IRQn = 54, /**< OR of GPT Rollover interrupt line, Input Cap… enumerator 33556 #define GPT_IRQS { NotAvail_IRQn, GPT1_IRQn, GPT2_IRQn, GPT3_IRQn, …
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/ |
| D | MIMXRT1064.h | 195 GPT2_IRQn = 101, /**< GPT2 interrupt */ enumerator 24544 #define GPT_IRQS { NotAvail_IRQn, GPT1_IRQn, GPT2_IRQn }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN1/ |
| D | MIMX8MN1_cm7.h | 138 …GPT2_IRQn = 54, /**< OR of GPT Rollover interrupt line, Input Cap… enumerator 33556 #define GPT_IRQS { NotAvail_IRQn, GPT1_IRQn, GPT2_IRQn, GPT3_IRQn, …
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN6/ |
| D | MIMX8MN6_cm7.h | 136 …GPT2_IRQn = 54, /**< OR of GPT Rollover interrupt line, Input Cap… enumerator 33554 #define GPT_IRQS { NotAvail_IRQn, GPT1_IRQn, GPT2_IRQn, GPT3_IRQn, …
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| D | MIMX8MN6_ca53.h | 162 …GPT2_IRQn = 86, /**< OR of GPT Rollover interrupt line, Input Cap… enumerator 33582 #define GPT_IRQS { NotAvail_IRQn, GPT1_IRQn, GPT2_IRQn, GPT3_IRQn, …
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ5/ |
| D | MIMX8MQ5_cm4.h | 140 …GPT2_IRQn = 54, /**< OR of GPT Rollover interrupt line, Input Cap… enumerator 31112 #define GPT_IRQS { NotAvail_IRQn, GPT1_IRQn, GPT2_IRQn, GPT3_IRQn, …
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/ |
| D | MIMXRT1062.h | 199 GPT2_IRQn = 101, /**< GPT2 interrupt */ enumerator 24534 #define GPT_IRQS { NotAvail_IRQn, GPT1_IRQn, GPT2_IRQn }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD7/ |
| D | MIMX8MD7_cm4.h | 140 …GPT2_IRQn = 54, /**< OR of GPT Rollover interrupt line, Input Cap… enumerator 31112 #define GPT_IRQS { NotAvail_IRQn, GPT1_IRQn, GPT2_IRQn, GPT3_IRQn, …
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