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Searched refs:GPC_PGC_MIX_PDNSCR_ISO_MASK (Results 1 – 6 of 6) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ5/
DMIMX8MQ5_cm4.h26313 #define GPC_PGC_MIX_PDNSCR_ISO_MASK (0x3FU) macro
26315 … (((uint32_t)(((uint32_t)(x)) << GPC_PGC_MIX_PDNSCR_ISO_SHIFT)) & GPC_PGC_MIX_PDNSCR_ISO_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD7/
DMIMX8MD7_cm4.h26313 #define GPC_PGC_MIX_PDNSCR_ISO_MASK (0x3FU) macro
26315 … (((uint32_t)(((uint32_t)(x)) << GPC_PGC_MIX_PDNSCR_ISO_SHIFT)) & GPC_PGC_MIX_PDNSCR_ISO_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD6/
DMIMX8MD6_cm4.h26313 #define GPC_PGC_MIX_PDNSCR_ISO_MASK (0x3FU) macro
26315 … (((uint32_t)(((uint32_t)(x)) << GPC_PGC_MIX_PDNSCR_ISO_SHIFT)) & GPC_PGC_MIX_PDNSCR_ISO_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ6/
DMIMX8MQ6_cm4.h26313 #define GPC_PGC_MIX_PDNSCR_ISO_MASK (0x3FU) macro
26315 … (((uint32_t)(((uint32_t)(x)) << GPC_PGC_MIX_PDNSCR_ISO_SHIFT)) & GPC_PGC_MIX_PDNSCR_ISO_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ7/
DMIMX8MQ7_cm4.h26313 #define GPC_PGC_MIX_PDNSCR_ISO_MASK (0x3FU) macro
26315 … (((uint32_t)(((uint32_t)(x)) << GPC_PGC_MIX_PDNSCR_ISO_SHIFT)) & GPC_PGC_MIX_PDNSCR_ISO_MASK)
/hal_nxp-latest/imx/devices/MCIMX7D/
DMCIMX7D_M4.h19431 #define GPC_PGC_MIX_PDNSCR_ISO_MASK 0x3Fu macro
19433 … (((uint32_t)(((uint32_t)(x))<<GPC_PGC_MIX_PDNSCR_ISO_SHIFT))&GPC_PGC_MIX_PDNSCR_ISO_MASK)