| /hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1171/ |
| D | fsl_pm_device.h | 620 #define PM_WSID_GPC_IRQ PM_ENCODE_WAKEUP_SOURCE_ID(GPC_IRQn) /*!< GP…
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| /hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1172/ |
| D | fsl_pm_device.h | 620 #define PM_WSID_GPC_IRQ PM_ENCODE_WAKEUP_SOURCE_ID(GPC_IRQn) /*!< GP…
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| /hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1173/ |
| D | fsl_pm_device.h | 620 #define PM_WSID_GPC_IRQ PM_ENCODE_WAKEUP_SOURCE_ID(GPC_IRQn) /*!< GP…
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| /hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1176/ |
| D | fsl_pm_device.h | 620 #define PM_WSID_GPC_IRQ PM_ENCODE_WAKEUP_SOURCE_ID(GPC_IRQn) /*!< GP…
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| /hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1175/ |
| D | fsl_pm_device.h | 620 #define PM_WSID_GPC_IRQ PM_ENCODE_WAKEUP_SOURCE_ID(GPC_IRQn) /*!< GP…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1011/ |
| D | MIMXRT1011.h | 152 GPC_IRQn = 66, /**< GPC interrupt */ enumerator 14523 #define GPC_IRQS { GPC_IRQn }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1015/ |
| D | MIMXRT1015.h | 187 GPC_IRQn = 97, /**< GPC interrupt */ enumerator 17017 #define GPC_IRQS { GPC_IRQn }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/ |
| D | MIMXRT1024.h | 181 GPC_IRQn = 97, /**< GPC interrupt */ enumerator 20336 #define GPC_IRQS { GPC_IRQn }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/ |
| D | MIMXRT1021.h | 189 GPC_IRQn = 97, /**< GPC interrupt */ enumerator 20356 #define GPC_IRQS { GPC_IRQn }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/ |
| D | MIMXRT1051.h | 191 GPC_IRQn = 97, /**< GPC interrupt */ enumerator 21293 #define GPC_IRQS { GPC_IRQn }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/ |
| D | MIMXRT1041.h | 179 GPC_IRQn = 97, /**< GPC interrupt */ enumerator 22480 #define GPC_IRQS { GPC_IRQn }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/ |
| D | MIMXRT1052.h | 191 GPC_IRQn = 97, /**< GPC interrupt */ enumerator 22078 #define GPC_IRQS { GPC_IRQn }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/ |
| D | MIMXRT1042.h | 179 GPC_IRQn = 97, /**< GPC interrupt */ enumerator 22482 #define GPC_IRQS { GPC_IRQn }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/ |
| D | MIMXRT1061.h | 194 GPC_IRQn = 97, /**< GPC interrupt */ enumerator 22858 #define GPC_IRQS { GPC_IRQn }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN5/ |
| D | MIMX8MN5_cm7.h | 171 GPC_IRQn = 87, /**< GPC Interrupt Request 1 */ enumerator 30679 #define GPC_IRQS { GPC_IRQn }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN2/ |
| D | MIMX8MN2_cm7.h | 169 GPC_IRQn = 87, /**< GPC Interrupt Request 1 */ enumerator 30677 #define GPC_IRQS { GPC_IRQn }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN4/ |
| D | MIMX8MN4_cm7.h | 169 GPC_IRQn = 87, /**< GPC Interrupt Request 1 */ enumerator 30677 #define GPC_IRQS { GPC_IRQn }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN3/ |
| D | MIMX8MN3_cm7.h | 171 GPC_IRQn = 87, /**< GPC Interrupt Request 1 */ enumerator 30679 #define GPC_IRQS { GPC_IRQn }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/ |
| D | MIMXRT1064.h | 191 GPC_IRQn = 97, /**< GPC interrupt */ enumerator 23715 #define GPC_IRQS { GPC_IRQn }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN1/ |
| D | MIMX8MN1_cm7.h | 171 GPC_IRQn = 87, /**< GPC Interrupt Request 1 */ enumerator 30679 #define GPC_IRQS { GPC_IRQn }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN6/ |
| D | MIMX8MN6_cm7.h | 169 GPC_IRQn = 87, /**< GPC Interrupt Request 1 */ enumerator 30677 #define GPC_IRQS { GPC_IRQn }
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| D | MIMX8MN6_ca53.h | 195 GPC_IRQn = 119, /**< GPC Interrupt Request 1 */ enumerator 30705 #define GPC_IRQS { GPC_IRQn }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ5/ |
| D | MIMX8MQ5_cm4.h | 173 GPC_IRQn = 87, /**< GPC Interrupt Request 1 */ enumerator 25284 #define GPC_IRQS { GPC_IRQn }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/ |
| D | MIMXRT1062.h | 195 GPC_IRQn = 97, /**< GPC interrupt */ enumerator 23644 #define GPC_IRQS { GPC_IRQn }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD7/ |
| D | MIMX8MD7_cm4.h | 173 GPC_IRQn = 87, /**< GPC Interrupt Request 1 */ enumerator 25284 #define GPC_IRQS { GPC_IRQn }
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