Searched refs:GPC_IMR_M7_IMR4_M7_MASK (Results 1 – 14 of 14) sorted by relevance
71 #define GPC_IMR_IMR4_MASK GPC_IMR_M7_IMR4_M7_MASK
28840 #define GPC_IMR_M7_IMR4_M7_MASK (0xFFFFFFFFU) macro28846 … (((uint32_t)(((uint32_t)(x)) << GPC_IMR_M7_IMR4_M7_SHIFT)) & GPC_IMR_M7_IMR4_M7_MASK)
28838 #define GPC_IMR_M7_IMR4_M7_MASK (0xFFFFFFFFU) macro28844 … (((uint32_t)(((uint32_t)(x)) << GPC_IMR_M7_IMR4_M7_SHIFT)) & GPC_IMR_M7_IMR4_M7_MASK)
28866 #define GPC_IMR_M7_IMR4_M7_MASK (0xFFFFFFFFU) macro28872 … (((uint32_t)(((uint32_t)(x)) << GPC_IMR_M7_IMR4_M7_SHIFT)) & GPC_IMR_M7_IMR4_M7_MASK)
49561 #define GPC_IMR_M7_IMR4_M7_MASK (0xFFFFFFFFU) macro49567 … (((uint32_t)(((uint32_t)(x)) << GPC_IMR_M7_IMR4_M7_SHIFT)) & GPC_IMR_M7_IMR4_M7_MASK)
47448 #define GPC_IMR_M7_IMR4_M7_MASK (0xFFFFFFFFU) macro47454 … (((uint32_t)(((uint32_t)(x)) << GPC_IMR_M7_IMR4_M7_SHIFT)) & GPC_IMR_M7_IMR4_M7_MASK)
49587 #define GPC_IMR_M7_IMR4_M7_MASK (0xFFFFFFFFU) macro49593 … (((uint32_t)(((uint32_t)(x)) << GPC_IMR_M7_IMR4_M7_SHIFT)) & GPC_IMR_M7_IMR4_M7_MASK)
