Searched refs:GPC_IMR_M7_IMR1_M7_MASK (Results 1 – 14 of 14) sorted by relevance
68 #define GPC_IMR_IMR1_MASK GPC_IMR_M7_IMR1_M7_MASK
28816 #define GPC_IMR_M7_IMR1_M7_MASK (0xFFFFFFFFU) macro28822 … (((uint32_t)(((uint32_t)(x)) << GPC_IMR_M7_IMR1_M7_SHIFT)) & GPC_IMR_M7_IMR1_M7_MASK)
28814 #define GPC_IMR_M7_IMR1_M7_MASK (0xFFFFFFFFU) macro28820 … (((uint32_t)(((uint32_t)(x)) << GPC_IMR_M7_IMR1_M7_SHIFT)) & GPC_IMR_M7_IMR1_M7_MASK)
28842 #define GPC_IMR_M7_IMR1_M7_MASK (0xFFFFFFFFU) macro28848 … (((uint32_t)(((uint32_t)(x)) << GPC_IMR_M7_IMR1_M7_SHIFT)) & GPC_IMR_M7_IMR1_M7_MASK)
49537 #define GPC_IMR_M7_IMR1_M7_MASK (0xFFFFFFFFU) macro49543 … (((uint32_t)(((uint32_t)(x)) << GPC_IMR_M7_IMR1_M7_SHIFT)) & GPC_IMR_M7_IMR1_M7_MASK)
47424 #define GPC_IMR_M7_IMR1_M7_MASK (0xFFFFFFFFU) macro47430 … (((uint32_t)(((uint32_t)(x)) << GPC_IMR_M7_IMR1_M7_SHIFT)) & GPC_IMR_M7_IMR1_M7_MASK)
49563 #define GPC_IMR_M7_IMR1_M7_MASK (0xFFFFFFFFU) macro49569 … (((uint32_t)(((uint32_t)(x)) << GPC_IMR_M7_IMR1_M7_SHIFT)) & GPC_IMR_M7_IMR1_M7_MASK)
