Searched refs:GEN4PHY_DMD_WAVE_REG1_SMPL7_MASK (Results 1 – 4 of 4) sorted by relevance
10468 #define GEN4PHY_DMD_WAVE_REG1_SMPL7_MASK (0x3F000U) macro10471 …int32_t)(((uint32_t)(x)) << GEN4PHY_DMD_WAVE_REG1_SMPL7_SHIFT)) & GEN4PHY_DMD_WAVE_REG1_SMPL7_MASK)
12637 #define GEN4PHY_DMD_WAVE_REG1_SMPL7_MASK (0x3F000U) macro12640 …int32_t)(((uint32_t)(x)) << GEN4PHY_DMD_WAVE_REG1_SMPL7_SHIFT)) & GEN4PHY_DMD_WAVE_REG1_SMPL7_MASK)
13177 #define GEN4PHY_DMD_WAVE_REG1_SMPL7_MASK (0x3F000U) macro13180 …int32_t)(((uint32_t)(x)) << GEN4PHY_DMD_WAVE_REG1_SMPL7_SHIFT)) & GEN4PHY_DMD_WAVE_REG1_SMPL7_MASK)
21525 #define GEN4PHY_DMD_WAVE_REG1_SMPL7_MASK (0x3F000U) macro21528 …int32_t)(((uint32_t)(x)) << GEN4PHY_DMD_WAVE_REG1_SMPL7_SHIFT)) & GEN4PHY_DMD_WAVE_REG1_SMPL7_MASK)
