| /hal_nxp-latest/imx/drivers/ |
| D | rdc_semaphore.c | 69 semaphore->GATE[index] = RDC_SEMAPHORE_GATE_GTFSM(RDC_SEMAPHORE_MASTER_SELF + 1); in RDC_SEMAPHORE_TryLock()
71 return ((semaphore->GATE[index] & RDC_SEMAPHORE_GATE_GTFSM_MASK) == in RDC_SEMAPHORE_TryLock()
92 while (semaphore->GATE[index] & RDC_SEMAPHORE_GATE_GTFSM_MASK) { } in RDC_SEMAPHORE_Lock()
93 semaphore->GATE[index] = RDC_SEMAPHORE_GATE_GTFSM(RDC_SEMAPHORE_MASTER_SELF + 1); in RDC_SEMAPHORE_Lock()
94 } while ((semaphore->GATE[index] & RDC_SEMAPHORE_GATE_GTFSM_MASK) != in RDC_SEMAPHORE_Lock()
111 semaphore->GATE[index] = RDC_SEMAPHORE_GATE_GTFSM(0); in RDC_SEMAPHORE_Unlock()
127 return (semaphore->GATE[index] & RDC_SEMAPHORE_GATE_LDOM_MASK) >> RDC_SEMAPHORE_GATE_LDOM_SHIFT; in RDC_SEMAPHORE_GetLockDomainID()
144 …master = (semaphore->GATE[index] & RDC_SEMAPHORE_GATE_GTFSM_MASK) >> RDC_SEMAPHORE_GATE_GTFSM_SHIF… in RDC_SEMAPHORE_GetLockMaster()
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| /hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/ |
| D | S32Z2_SMU_SEMA42.h | 76 __IO uint8_t GATE[SMU_SEMA42_GATE_COUNT]; /**< Gate, array offset: 0x0, array step: 0x1 */ member
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| D | S32Z2_CE_SEMA42.h | 76 __IO uint8_t GATE[CE_SEMA42_GATE_COUNT]; /**< Gate, array offset: 0x0, array step: 0x1 */ member
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| D | S32Z2_RTU_SEMA42.h | 76 __IO uint8_t GATE[RTU_SEMA42_GATE_COUNT]; /**< Gate, array offset: 0x0, array step: 0x1 */ member
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| D | S32Z2_SEMA42.h | 76 __IO uint8_t GATE[SEMA42_GATE_COUNT]; /**< Gate, array offset: 0x0, array step: 0x1 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/rdc_sema42/ |
| D | fsl_rdc_sema42.h | 34 #define RDC_SEMA42_GATEn(base, n) ((base)->GATE[(n)])
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| /hal_nxp-latest/s32/drivers/s32k3/BaseNXP/header/ |
| D | S32K344_SEMA42.h | 76 …__IO uint8_t GATE[SEMA42_GATE_COUNT]; /**< Gate Register, array offset: 0x0, array step… member
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/sema4/ |
| D | fsl_sema4.h | 36 #define SEMA4_GATEn(base, n) ((base)->GATE[(n)])
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| /hal_nxp-latest/imx/devices/MCIMX6X/ |
| D | MCIMX6X_M4.h | 31672 …__IO uint8_t GATE[64]; /**< Gate Register, array offset: 0x… member
31689 #define RDC_SEMAPHORE_GATE_REG(base,index) ((base)->GATE[index])
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| /hal_nxp-latest/imx/devices/MCIMX7D/ |
| D | MCIMX7D_M4.h | 38858 …__IO uint8_t GATE[64]; /**< Gate Register, array offset: 0x0, arra… member
38875 #define RDC_SEMAPHORE_GATE_REG(base,index) ((base)->GATE[index])
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/ |
| D | MIMXRT1175_cm4.h | 64281 …__IO uint8_t GATE[64]; /**< Gate Register, array offset: 0x0, array step… member
64624 …__IO uint8_t GATE[16]; /**< Semaphores Gate n Register, array offset: 0x… member
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| D | MIMXRT1175_cm7.h | 63379 …__IO uint8_t GATE[64]; /**< Gate Register, array offset: 0x0, array step… member
63722 …__IO uint8_t GATE[16]; /**< Semaphores Gate n Register, array offset: 0x… member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/ |
| D | MIMXRT1165_cm7.h | 62877 …__IO uint8_t GATE[64]; /**< Gate Register, array offset: 0x0, array step… member
63220 …__IO uint8_t GATE[16]; /**< Semaphores Gate n Register, array offset: 0x… member
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| D | MIMXRT1165_cm4.h | 63779 …__IO uint8_t GATE[64]; /**< Gate Register, array offset: 0x0, array step… member
64122 …__IO uint8_t GATE[16]; /**< Semaphores Gate n Register, array offset: 0x… member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/ |
| D | MIMXRT1171.h | 63379 …__IO uint8_t GATE[64]; /**< Gate Register, array offset: 0x0, array step… member
63722 …__IO uint8_t GATE[16]; /**< Semaphores Gate n Register, array offset: 0x… member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/ |
| D | MIMXRT1166_cm4.h | 69242 …__IO uint8_t GATE[64]; /**< Gate Register, array offset: 0x0, array step… member
69585 …__IO uint8_t GATE[16]; /**< Semaphores Gate n Register, array offset: 0x… member
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| D | MIMXRT1166_cm7.h | 68340 …__IO uint8_t GATE[64]; /**< Gate Register, array offset: 0x0, array step… member
68683 …__IO uint8_t GATE[16]; /**< Semaphores Gate n Register, array offset: 0x… member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/ |
| D | MIMXRT1173_cm4.h | 69741 …__IO uint8_t GATE[64]; /**< Gate Register, array offset: 0x0, array step… member
70084 …__IO uint8_t GATE[16]; /**< Semaphores Gate n Register, array offset: 0x… member
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| D | MIMXRT1173_cm7.h | 68839 …__IO uint8_t GATE[64]; /**< Gate Register, array offset: 0x0, array step… member
69182 …__IO uint8_t GATE[16]; /**< Semaphores Gate n Register, array offset: 0x… member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/ |
| D | MIMXRT1172.h | 68842 …__IO uint8_t GATE[64]; /**< Gate Register, array offset: 0x0, array step… member
69185 …__IO uint8_t GATE[16]; /**< Semaphores Gate n Register, array offset: 0x… member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/ |
| D | MIMXRT1176_cm7.h | 79509 …__IO uint8_t GATE[64]; /**< Gate Register, array offset: 0x0, array step… member
79852 …__IO uint8_t GATE[16]; /**< Semaphores Gate n Register, array offset: 0x… member
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| D | MIMXRT1176_cm4.h | 80411 …__IO uint8_t GATE[64]; /**< Gate Register, array offset: 0x0, array step… member
80754 …__IO uint8_t GATE[16]; /**< Semaphores Gate n Register, array offset: 0x… member
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