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Searched refs:FTM_SWOCTRL_CH7OCV_MASK (Results 1 – 25 of 71) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K142_FTM.h1221 #define FTM_SWOCTRL_CH7OCV_MASK (0x8000U) macro
1224 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH7OCV_SHIFT)) & FTM_SWOCTRL_CH7OCV_MASK)
DS32K148_FTM.h1237 #define FTM_SWOCTRL_CH7OCV_MASK (0x8000U) macro
1240 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH7OCV_SHIFT)) & FTM_SWOCTRL_CH7OCV_MASK)
DS32K118_FTM.h1213 #define FTM_SWOCTRL_CH7OCV_MASK (0x8000U) macro
1216 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH7OCV_SHIFT)) & FTM_SWOCTRL_CH7OCV_MASK)
DS32K116_FTM.h1213 #define FTM_SWOCTRL_CH7OCV_MASK (0x8000U) macro
1216 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH7OCV_SHIFT)) & FTM_SWOCTRL_CH7OCV_MASK)
DS32K146_FTM.h1229 #define FTM_SWOCTRL_CH7OCV_MASK (0x8000U) macro
1232 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH7OCV_SHIFT)) & FTM_SWOCTRL_CH7OCV_MASK)
DS32K142W_FTM.h1221 #define FTM_SWOCTRL_CH7OCV_MASK (0x8000U) macro
1224 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH7OCV_SHIFT)) & FTM_SWOCTRL_CH7OCV_MASK)
DS32K144W_FTM.h1221 #define FTM_SWOCTRL_CH7OCV_MASK (0x8000U) macro
1224 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH7OCV_SHIFT)) & FTM_SWOCTRL_CH7OCV_MASK)
DS32K144_FTM.h1217 #define FTM_SWOCTRL_CH7OCV_MASK (0x8000U) macro
1220 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH7OCV_SHIFT)) & FTM_SWOCTRL_CH7OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE04Z4/
DMKE04Z4.h2216 #define FTM_SWOCTRL_CH7OCV_MASK (0x8000U) macro
2222 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH7OCV_SHIFT)) & FTM_SWOCTRL_CH7OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE02Z4/
DMKE02Z4.h2204 #define FTM_SWOCTRL_CH7OCV_MASK (0x8000U) macro
2210 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH7OCV_SHIFT)) & FTM_SWOCTRL_CH7OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE04Z1284/
DMKE04Z1284.h2229 #define FTM_SWOCTRL_CH7OCV_MASK (0x8000U) macro
2235 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH7OCV_SHIFT)) & FTM_SWOCTRL_CH7OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE06Z4/
DMKE06Z4.h2229 #define FTM_SWOCTRL_CH7OCV_MASK (0x8000U) macro
2235 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH7OCV_SHIFT)) & FTM_SWOCTRL_CH7OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK02F12810/
DMK02F12810.h4931 #define FTM_SWOCTRL_CH7OCV_MASK (0x8000U) macro
4937 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH7OCV_SHIFT)) & FTM_SWOCTRL_CH7OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC865/
DLPC865.h3463 #define FTM_SWOCTRL_CH7OCV_MASK (0x8000U) macro
3469 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH7OCV_SHIFT)) & FTM_SWOCTRL_CH7OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC864/
DLPC864.h3461 #define FTM_SWOCTRL_CH7OCV_MASK (0x8000U) macro
3467 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH7OCV_SHIFT)) & FTM_SWOCTRL_CH7OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV30F12810/
DMKV30F12810.h4936 #define FTM_SWOCTRL_CH7OCV_MASK (0x8000U) macro
4942 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH7OCV_SHIFT)) & FTM_SWOCTRL_CH7OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z7/
DMKV10Z7.h4362 #define FTM_SWOCTRL_CH7OCV_MASK (0x8000U) macro
4368 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH7OCV_SHIFT)) & FTM_SWOCTRL_CH7OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F12810/
DMKV31F12810.h4963 #define FTM_SWOCTRL_CH7OCV_MASK (0x8000U) macro
4969 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH7OCV_SHIFT)) & FTM_SWOCTRL_CH7OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z1287/
DMKV10Z1287.h4838 #define FTM_SWOCTRL_CH7OCV_MASK (0x8000U) macro
4844 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH7OCV_SHIFT)) & FTM_SWOCTRL_CH7OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/
DMKE12Z7.h6007 #define FTM_SWOCTRL_CH7OCV_MASK (0x8000U) macro
6013 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH7OCV_SHIFT)) & FTM_SWOCTRL_CH7OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/
DMKE12Z9.h5907 #define FTM_SWOCTRL_CH7OCV_MASK (0x8000U) macro
5913 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH7OCV_SHIFT)) & FTM_SWOCTRL_CH7OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z7/
DMKE17Z7.h6011 #define FTM_SWOCTRL_CH7OCV_MASK (0x8000U) macro
6017 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH7OCV_SHIFT)) & FTM_SWOCTRL_CH7OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z7/
DMKE13Z7.h6009 #define FTM_SWOCTRL_CH7OCV_MASK (0x8000U) macro
6015 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH7OCV_SHIFT)) & FTM_SWOCTRL_CH7OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV11Z7/
DMKV11Z7.h5626 #define FTM_SWOCTRL_CH7OCV_MASK (0x8000U) macro
5632 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH7OCV_SHIFT)) & FTM_SWOCTRL_CH7OCV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F25612/
DMKV31F25612.h5726 #define FTM_SWOCTRL_CH7OCV_MASK (0x8000U) macro
5732 … (((uint32_t)(((uint32_t)(x)) << FTM_SWOCTRL_CH7OCV_SHIFT)) & FTM_SWOCTRL_CH7OCV_MASK)

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