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Searched refs:FTM_QDCTRL_PHAPOL_MASK (Results 1 – 25 of 65) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K142_FTM.h971 #define FTM_QDCTRL_PHAPOL_MASK (0x20U) macro
974 … (((uint32_t)(((uint32_t)(x)) << FTM_QDCTRL_PHAPOL_SHIFT)) & FTM_QDCTRL_PHAPOL_MASK)
DS32K148_FTM.h987 #define FTM_QDCTRL_PHAPOL_MASK (0x20U) macro
990 … (((uint32_t)(((uint32_t)(x)) << FTM_QDCTRL_PHAPOL_SHIFT)) & FTM_QDCTRL_PHAPOL_MASK)
DS32K118_FTM.h963 #define FTM_QDCTRL_PHAPOL_MASK (0x20U) macro
966 … (((uint32_t)(((uint32_t)(x)) << FTM_QDCTRL_PHAPOL_SHIFT)) & FTM_QDCTRL_PHAPOL_MASK)
DS32K116_FTM.h963 #define FTM_QDCTRL_PHAPOL_MASK (0x20U) macro
966 … (((uint32_t)(((uint32_t)(x)) << FTM_QDCTRL_PHAPOL_SHIFT)) & FTM_QDCTRL_PHAPOL_MASK)
DS32K146_FTM.h979 #define FTM_QDCTRL_PHAPOL_MASK (0x20U) macro
982 … (((uint32_t)(((uint32_t)(x)) << FTM_QDCTRL_PHAPOL_SHIFT)) & FTM_QDCTRL_PHAPOL_MASK)
DS32K142W_FTM.h971 #define FTM_QDCTRL_PHAPOL_MASK (0x20U) macro
974 … (((uint32_t)(((uint32_t)(x)) << FTM_QDCTRL_PHAPOL_SHIFT)) & FTM_QDCTRL_PHAPOL_MASK)
DS32K144W_FTM.h971 #define FTM_QDCTRL_PHAPOL_MASK (0x20U) macro
974 … (((uint32_t)(((uint32_t)(x)) << FTM_QDCTRL_PHAPOL_SHIFT)) & FTM_QDCTRL_PHAPOL_MASK)
DS32K144_FTM.h967 #define FTM_QDCTRL_PHAPOL_MASK (0x20U) macro
970 … (((uint32_t)(((uint32_t)(x)) << FTM_QDCTRL_PHAPOL_SHIFT)) & FTM_QDCTRL_PHAPOL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/drivers/ftm/
Dfsl_ftm.c1020 …RL_QUADMODE_MASK | FTM_QDCTRL_PHAFLTREN_MASK | FTM_QDCTRL_PHBFLTREN_MASK | FTM_QDCTRL_PHAPOL_MASK | in FTM_SetupQuadDecode()
/hal_nxp-latest/mcux/mcux-sdk/devices/MK02F12810/
DMK02F12810.h4604 #define FTM_QDCTRL_PHAPOL_MASK (0x20U) macro
4610 … (((uint32_t)(((uint32_t)(x)) << FTM_QDCTRL_PHAPOL_SHIFT)) & FTM_QDCTRL_PHAPOL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC865/
DLPC865.h3081 #define FTM_QDCTRL_PHAPOL_MASK (0x20U) macro
3087 … (((uint32_t)(((uint32_t)(x)) << FTM_QDCTRL_PHAPOL_SHIFT)) & FTM_QDCTRL_PHAPOL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC864/
DLPC864.h3079 #define FTM_QDCTRL_PHAPOL_MASK (0x20U) macro
3085 … (((uint32_t)(((uint32_t)(x)) << FTM_QDCTRL_PHAPOL_SHIFT)) & FTM_QDCTRL_PHAPOL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV30F12810/
DMKV30F12810.h4609 #define FTM_QDCTRL_PHAPOL_MASK (0x20U) macro
4615 … (((uint32_t)(((uint32_t)(x)) << FTM_QDCTRL_PHAPOL_SHIFT)) & FTM_QDCTRL_PHAPOL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z7/
DMKV10Z7.h4035 #define FTM_QDCTRL_PHAPOL_MASK (0x20U) macro
4041 … (((uint32_t)(((uint32_t)(x)) << FTM_QDCTRL_PHAPOL_SHIFT)) & FTM_QDCTRL_PHAPOL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z4/
DMKE14Z4.h2917 #define FTM_QDCTRL_PHAPOL_MASK (0x20U) macro
2923 … (((uint32_t)(((uint32_t)(x)) << FTM_QDCTRL_PHAPOL_SHIFT)) & FTM_QDCTRL_PHAPOL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F12810/
DMKV31F12810.h4636 #define FTM_QDCTRL_PHAPOL_MASK (0x20U) macro
4642 … (((uint32_t)(((uint32_t)(x)) << FTM_QDCTRL_PHAPOL_SHIFT)) & FTM_QDCTRL_PHAPOL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z4/
DMKE15Z4.h2918 #define FTM_QDCTRL_PHAPOL_MASK (0x20U) macro
2924 … (((uint32_t)(((uint32_t)(x)) << FTM_QDCTRL_PHAPOL_SHIFT)) & FTM_QDCTRL_PHAPOL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z1287/
DMKV10Z1287.h4511 #define FTM_QDCTRL_PHAPOL_MASK (0x20U) macro
4517 … (((uint32_t)(((uint32_t)(x)) << FTM_QDCTRL_PHAPOL_SHIFT)) & FTM_QDCTRL_PHAPOL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16Z4/
DMKE16Z4.h2916 #define FTM_QDCTRL_PHAPOL_MASK (0x20U) macro
2922 … (((uint32_t)(((uint32_t)(x)) << FTM_QDCTRL_PHAPOL_SHIFT)) & FTM_QDCTRL_PHAPOL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV11Z7/
DMKV11Z7.h5299 #define FTM_QDCTRL_PHAPOL_MASK (0x20U) macro
5305 … (((uint32_t)(((uint32_t)(x)) << FTM_QDCTRL_PHAPOL_SHIFT)) & FTM_QDCTRL_PHAPOL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F25612/
DMKV31F25612.h5399 #define FTM_QDCTRL_PHAPOL_MASK (0x20U) macro
5405 … (((uint32_t)(((uint32_t)(x)) << FTM_QDCTRL_PHAPOL_SHIFT)) & FTM_QDCTRL_PHAPOL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F51212/
DMKV31F51212.h5641 #define FTM_QDCTRL_PHAPOL_MASK (0x20U) macro
5647 … (((uint32_t)(((uint32_t)(x)) << FTM_QDCTRL_PHAPOL_SHIFT)) & FTM_QDCTRL_PHAPOL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F12810/
DMK22F12810.h4640 #define FTM_QDCTRL_PHAPOL_MASK (0x20U) macro
4646 … (((uint32_t)(((uint32_t)(x)) << FTM_QDCTRL_PHAPOL_SHIFT)) & FTM_QDCTRL_PHAPOL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z7/
DMKE14Z7.h5424 #define FTM_QDCTRL_PHAPOL_MASK (0x20U) macro
5430 … (((uint32_t)(((uint32_t)(x)) << FTM_QDCTRL_PHAPOL_SHIFT)) & FTM_QDCTRL_PHAPOL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z7/
DMKE15Z7.h5426 #define FTM_QDCTRL_PHAPOL_MASK (0x20U) macro
5432 … (((uint32_t)(((uint32_t)(x)) << FTM_QDCTRL_PHAPOL_SHIFT)) & FTM_QDCTRL_PHAPOL_MASK)

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