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Searched refs:FTM_COMBINE_DECAP1_MASK (Results 1 – 25 of 74) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K142_FTM.h603 #define FTM_COMBINE_DECAP1_MASK (0x800U) macro
606 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DECAP1_SHIFT)) & FTM_COMBINE_DECAP1_MASK)
DS32K148_FTM.h619 #define FTM_COMBINE_DECAP1_MASK (0x800U) macro
622 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DECAP1_SHIFT)) & FTM_COMBINE_DECAP1_MASK)
DS32K118_FTM.h595 #define FTM_COMBINE_DECAP1_MASK (0x800U) macro
598 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DECAP1_SHIFT)) & FTM_COMBINE_DECAP1_MASK)
DS32K116_FTM.h595 #define FTM_COMBINE_DECAP1_MASK (0x800U) macro
598 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DECAP1_SHIFT)) & FTM_COMBINE_DECAP1_MASK)
DS32K146_FTM.h611 #define FTM_COMBINE_DECAP1_MASK (0x800U) macro
614 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DECAP1_SHIFT)) & FTM_COMBINE_DECAP1_MASK)
DS32K142W_FTM.h603 #define FTM_COMBINE_DECAP1_MASK (0x800U) macro
606 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DECAP1_SHIFT)) & FTM_COMBINE_DECAP1_MASK)
DS32K144W_FTM.h603 #define FTM_COMBINE_DECAP1_MASK (0x800U) macro
606 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DECAP1_SHIFT)) & FTM_COMBINE_DECAP1_MASK)
DS32K144_FTM.h599 #define FTM_COMBINE_DECAP1_MASK (0x800U) macro
602 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DECAP1_SHIFT)) & FTM_COMBINE_DECAP1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE04Z4/
DMKE04Z4.h1517 #define FTM_COMBINE_DECAP1_MASK (0x800U) macro
1523 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DECAP1_SHIFT)) & FTM_COMBINE_DECAP1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE02Z4/
DMKE02Z4.h1505 #define FTM_COMBINE_DECAP1_MASK (0x800U) macro
1511 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DECAP1_SHIFT)) & FTM_COMBINE_DECAP1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE04Z1284/
DMKE04Z1284.h1530 #define FTM_COMBINE_DECAP1_MASK (0x800U) macro
1536 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DECAP1_SHIFT)) & FTM_COMBINE_DECAP1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE06Z4/
DMKE06Z4.h1530 #define FTM_COMBINE_DECAP1_MASK (0x800U) macro
1536 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DECAP1_SHIFT)) & FTM_COMBINE_DECAP1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK02F12810/
DMK02F12810.h4172 #define FTM_COMBINE_DECAP1_MASK (0x800U) macro
4178 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DECAP1_SHIFT)) & FTM_COMBINE_DECAP1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC865/
DLPC865.h2564 #define FTM_COMBINE_DECAP1_MASK (0x800U) macro
2570 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DECAP1_SHIFT)) & FTM_COMBINE_DECAP1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC864/
DLPC864.h2562 #define FTM_COMBINE_DECAP1_MASK (0x800U) macro
2568 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DECAP1_SHIFT)) & FTM_COMBINE_DECAP1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV30F12810/
DMKV30F12810.h4177 #define FTM_COMBINE_DECAP1_MASK (0x800U) macro
4183 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DECAP1_SHIFT)) & FTM_COMBINE_DECAP1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z7/
DMKV10Z7.h3603 #define FTM_COMBINE_DECAP1_MASK (0x800U) macro
3609 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DECAP1_SHIFT)) & FTM_COMBINE_DECAP1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z4/
DMKE14Z4.h2531 #define FTM_COMBINE_DECAP1_MASK (0x800U) macro
2537 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DECAP1_SHIFT)) & FTM_COMBINE_DECAP1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F12810/
DMKV31F12810.h4204 #define FTM_COMBINE_DECAP1_MASK (0x800U) macro
4210 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DECAP1_SHIFT)) & FTM_COMBINE_DECAP1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z4/
DMKE15Z4.h2532 #define FTM_COMBINE_DECAP1_MASK (0x800U) macro
2538 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DECAP1_SHIFT)) & FTM_COMBINE_DECAP1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z1287/
DMKV10Z1287.h4079 #define FTM_COMBINE_DECAP1_MASK (0x800U) macro
4085 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DECAP1_SHIFT)) & FTM_COMBINE_DECAP1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16Z4/
DMKE16Z4.h2530 #define FTM_COMBINE_DECAP1_MASK (0x800U) macro
2536 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DECAP1_SHIFT)) & FTM_COMBINE_DECAP1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/
DMKE12Z7.h5148 #define FTM_COMBINE_DECAP1_MASK (0x800U) macro
5154 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DECAP1_SHIFT)) & FTM_COMBINE_DECAP1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/
DMKE12Z9.h5063 #define FTM_COMBINE_DECAP1_MASK (0x800U) macro
5069 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DECAP1_SHIFT)) & FTM_COMBINE_DECAP1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z7/
DMKE17Z7.h5152 #define FTM_COMBINE_DECAP1_MASK (0x800U) macro
5158 … (((uint32_t)(((uint32_t)(x)) << FTM_COMBINE_DECAP1_SHIFT)) & FTM_COMBINE_DECAP1_MASK)

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