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Searched refs:FTFA_FSTAT_CCIF_MASK (Results 1 – 25 of 52) sorted by relevance

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/hal_nxp-latest/mcux/middleware/wireless/framework_5.3.3/XCVR/MKW40Z4/
Difr_mkw40z4_radio.c137 while((FTFA_FSTAT_CCIF_MASK & FTFA->FSTAT)==0); /* Wait till CCIF=1 */ in read_resource_ifr()
154 FTFA->FSTAT = FTFA_FSTAT_CCIF_MASK; in read_resource_ifr()
155 while((FTFA_FSTAT_CCIF_MASK & FTFA->FSTAT)==0); /* Wait till CCIF=1 */ in read_resource_ifr()
/hal_nxp-latest/mcux/middleware/wireless/framework_5.3.3/XCVR/MKW41Z4/
Difr_radio.c249 while ((FTFA_FSTAT_CCIF_MASK & FTFA->FSTAT) == 0); /* Wait till CCIF=1 */ in read_resource_ifr()
263 FTFA->FSTAT = FTFA_FSTAT_CCIF_MASK; in read_resource_ifr()
264 while ((FTFA_FSTAT_CCIF_MASK & FTFA->FSTAT) == 0); /* Wait till CCIF=1 */ in read_resource_ifr()
/hal_nxp-latest/mcux/mcux-sdk/drivers/flash/
Dfsl_ftfx_adapter.h32 #define FTFx_FSTAT_CCIF_MASK FTFA_FSTAT_CCIF_MASK
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC041/
DMCXC041.h1041 #define FTFA_FSTAT_CCIF_MASK (0x80U) macro
1047 … (((uint8_t)(((uint8_t)(x)) << FTFA_FSTAT_CCIF_SHIFT)) & FTFA_FSTAT_CCIF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL17Z644/
DMKL17Z644.h2355 #define FTFA_FSTAT_CCIF_MASK (0x80U) macro
2361 … (((uint8_t)(((uint8_t)(x)) << FTFA_FSTAT_CCIF_SHIFT)) & FTFA_FSTAT_CCIF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC141/
DMCXC141.h2611 #define FTFA_FSTAT_CCIF_MASK (0x80U) macro
2617 … (((uint8_t)(((uint8_t)(x)) << FTFA_FSTAT_CCIF_SHIFT)) & FTFA_FSTAT_CCIF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC142/
DMCXC142.h2609 #define FTFA_FSTAT_CCIF_MASK (0x80U) macro
2615 … (((uint8_t)(((uint8_t)(x)) << FTFA_FSTAT_CCIF_SHIFT)) & FTFA_FSTAT_CCIF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL25Z4/
DMKL25Z4.h1208 #define FTFA_FSTAT_CCIF_MASK (0x80U) macro
1210 … (((uint8_t)(((uint8_t)(x)) << FTFA_FSTAT_CCIF_SHIFT)) & FTFA_FSTAT_CCIF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC242/
DMCXC242.h2611 #define FTFA_FSTAT_CCIF_MASK (0x80U) macro
2617 … (((uint8_t)(((uint8_t)(x)) << FTFA_FSTAT_CCIF_SHIFT)) & FTFA_FSTAT_CCIF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL27Z644/
DMKL27Z644.h2364 #define FTFA_FSTAT_CCIF_MASK (0x80U) macro
2370 … (((uint8_t)(((uint8_t)(x)) << FTFA_FSTAT_CCIF_SHIFT)) & FTFA_FSTAT_CCIF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC144/
DMCXC144.h2469 #define FTFA_FSTAT_CCIF_MASK (0x80U) macro
2475 … (((uint8_t)(((uint8_t)(x)) << FTFA_FSTAT_CCIF_SHIFT)) & FTFA_FSTAT_CCIF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC143/
DMCXC143.h2469 #define FTFA_FSTAT_CCIF_MASK (0x80U) macro
2475 … (((uint8_t)(((uint8_t)(x)) << FTFA_FSTAT_CCIF_SHIFT)) & FTFA_FSTAT_CCIF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK02F12810/
DMK02F12810.h3199 #define FTFA_FSTAT_CCIF_MASK (0x80U) macro
3205 … (((uint8_t)(((uint8_t)(x)) << FTFA_FSTAT_CCIF_SHIFT)) & FTFA_FSTAT_CCIF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC243/
DMCXC243.h2467 #define FTFA_FSTAT_CCIF_MASK (0x80U) macro
2473 … (((uint8_t)(((uint8_t)(x)) << FTFA_FSTAT_CCIF_SHIFT)) & FTFA_FSTAT_CCIF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC244/
DMCXC244.h2469 #define FTFA_FSTAT_CCIF_MASK (0x80U) macro
2475 … (((uint8_t)(((uint8_t)(x)) << FTFA_FSTAT_CCIF_SHIFT)) & FTFA_FSTAT_CCIF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV30F12810/
DMKV30F12810.h3204 #define FTFA_FSTAT_CCIF_MASK (0x80U) macro
3210 … (((uint8_t)(((uint8_t)(x)) << FTFA_FSTAT_CCIF_SHIFT)) & FTFA_FSTAT_CCIF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z7/
DMKV10Z7.h2826 #define FTFA_FSTAT_CCIF_MASK (0x80U) macro
2832 … (((uint8_t)(((uint8_t)(x)) << FTFA_FSTAT_CCIF_SHIFT)) & FTFA_FSTAT_CCIF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z4/
DMKE14Z4.h1715 #define FTFA_FSTAT_CCIF_MASK (0x80U) macro
1721 … (((uint8_t)(((uint8_t)(x)) << FTFA_FSTAT_CCIF_SHIFT)) & FTFA_FSTAT_CCIF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F12810/
DMKV31F12810.h3232 #define FTFA_FSTAT_CCIF_MASK (0x80U) macro
3238 … (((uint8_t)(((uint8_t)(x)) << FTFA_FSTAT_CCIF_SHIFT)) & FTFA_FSTAT_CCIF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z4/
DMKE15Z4.h1716 #define FTFA_FSTAT_CCIF_MASK (0x80U) macro
1722 … (((uint8_t)(((uint8_t)(x)) << FTFA_FSTAT_CCIF_SHIFT)) & FTFA_FSTAT_CCIF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z1287/
DMKV10Z1287.h3107 #define FTFA_FSTAT_CCIF_MASK (0x80U) macro
3113 … (((uint8_t)(((uint8_t)(x)) << FTFA_FSTAT_CCIF_SHIFT)) & FTFA_FSTAT_CCIF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKM14ZA5/
DMKM14ZA5.h4295 #define FTFA_FSTAT_CCIF_MASK (0x80U) macro
4301 … (((uint8_t)(((uint8_t)(x)) << FTFA_FSTAT_CCIF_SHIFT)) & FTFA_FSTAT_CCIF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16Z4/
DMKE16Z4.h1714 #define FTFA_FSTAT_CCIF_MASK (0x80U) macro
1720 … (((uint8_t)(((uint8_t)(x)) << FTFA_FSTAT_CCIF_SHIFT)) & FTFA_FSTAT_CCIF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/
DMKE12Z7.h4145 #define FTFA_FSTAT_CCIF_MASK (0x80U) macro
4151 … (((uint8_t)(((uint8_t)(x)) << FTFA_FSTAT_CCIF_SHIFT)) & FTFA_FSTAT_CCIF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z7/
DMKE17Z7.h4149 #define FTFA_FSTAT_CCIF_MASK (0x80U) macro
4155 … (((uint8_t)(((uint8_t)(x)) << FTFA_FSTAT_CCIF_SHIFT)) & FTFA_FSTAT_CCIF_MASK)

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