| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML3/drivers/ |
| D | fsl_cache.c | 499 uint32_t addr = address & ~((uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE - 1U); in L1CACHE_InvalidateICacheByRange()
507 addr += (uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
508 size -= (int32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/drivers/cm7/ |
| D | fsl_cache.c | 499 uint32_t addr = address & ~((uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE - 1U); in L1CACHE_InvalidateICacheByRange()
507 addr += (uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
508 size -= (int32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/drivers/cm7/ |
| D | fsl_cache.c | 499 uint32_t addr = address & ~((uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE - 1U); in L1CACHE_InvalidateICacheByRange()
507 addr += (uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
508 size -= (int32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1189/drivers/cm7/ |
| D | fsl_cache.c | 499 uint32_t addr = address & ~((uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE - 1U); in L1CACHE_InvalidateICacheByRange()
507 addr += (uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
508 size -= (int32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
|
| /hal_nxp-latest/mcux/mcux-sdk/drivers/cache/armv7-m7/ |
| D | fsl_cache.c | 499 uint32_t addr = address & ~((uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE - 1U); in L1CACHE_InvalidateICacheByRange()
507 addr += (uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
508 size -= (int32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML4/drivers/ |
| D | fsl_cache.c | 499 uint32_t addr = address & ~((uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE - 1U); in L1CACHE_InvalidateICacheByRange()
507 addr += (uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
508 size -= (int32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/drivers/cm7/ |
| D | fsl_cache.c | 499 uint32_t addr = address & ~((uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE - 1U); in L1CACHE_InvalidateICacheByRange()
507 addr += (uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
508 size -= (int32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/drivers/cm7/ |
| D | fsl_cache.c | 499 uint32_t addr = address & ~((uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE - 1U); in L1CACHE_InvalidateICacheByRange()
507 addr += (uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
508 size -= (int32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/drivers/cm7/ |
| D | fsl_cache.c | 499 uint32_t addr = address & ~((uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE - 1U); in L1CACHE_InvalidateICacheByRange()
507 addr += (uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
508 size -= (int32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/drivers/cm7/ |
| D | fsl_cache.c | 499 uint32_t addr = address & ~((uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE - 1U); in L1CACHE_InvalidateICacheByRange()
507 addr += (uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
508 size -= (int32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/drivers/cm7/ |
| D | fsl_cache.c | 499 uint32_t addr = address & ~((uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE - 1U); in L1CACHE_InvalidateICacheByRange()
507 addr += (uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
508 size -= (int32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML6/drivers/ |
| D | fsl_cache.c | 499 uint32_t addr = address & ~((uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE - 1U); in L1CACHE_InvalidateICacheByRange()
507 addr += (uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
508 size -= (int32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1187/drivers/cm7/ |
| D | fsl_cache.c | 499 uint32_t addr = address & ~((uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE - 1U); in L1CACHE_InvalidateICacheByRange()
507 addr += (uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
508 size -= (int32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/drivers/cm4/ |
| D | fsl_cache.h | 30 FSL_FEATURE_L1ICACHE_LINESIZE_BYTE /*!< The code bus CACHE line size is 16B = 128b. */
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/drivers/cm4/ |
| D | fsl_cache.h | 30 FSL_FEATURE_L1ICACHE_LINESIZE_BYTE /*!< The code bus CACHE line size is 16B = 128b. */
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/drivers/cm4/ |
| D | fsl_cache.h | 30 FSL_FEATURE_L1ICACHE_LINESIZE_BYTE /*!< The code bus CACHE line size is 16B = 128b. */
|
| /hal_nxp-latest/mcux/mcux-sdk/drivers/cache/lmem/ |
| D | fsl_cache.h | 30 FSL_FEATURE_L1ICACHE_LINESIZE_BYTE /*!< The code bus CACHE line size is 16B = 128b. */
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/drivers/cm4/ |
| D | fsl_cache.h | 30 FSL_FEATURE_L1ICACHE_LINESIZE_BYTE /*!< The code bus CACHE line size is 16B = 128b. */
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/drivers/cm4/ |
| D | fsl_cache.h | 30 FSL_FEATURE_L1ICACHE_LINESIZE_BYTE /*!< The code bus CACHE line size is 16B = 128b. */
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM3/ |
| D | MIMX8MM3_cm4_features.h | 224 #define FSL_FEATURE_L1ICACHE_LINESIZE_BYTE (16) macro
|
| /hal_nxp-latest/s32/mcux/devices/S32K146/ |
| D | S32K146_features.h | 178 #define FSL_FEATURE_L1ICACHE_LINESIZE_BYTE (16) macro
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM1/ |
| D | MIMX8MM1_cm4_features.h | 224 #define FSL_FEATURE_L1ICACHE_LINESIZE_BYTE (16) macro
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN6/ |
| D | MIMX8MN6_ca53_features.h | 212 #define FSL_FEATURE_L1ICACHE_LINESIZE_BYTE (64) macro
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM5/ |
| D | MIMX8MM5_cm4_features.h | 224 #define FSL_FEATURE_L1ICACHE_LINESIZE_BYTE (16) macro
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM4/ |
| D | MIMX8MM4_cm4_features.h | 224 #define FSL_FEATURE_L1ICACHE_LINESIZE_BYTE (16) macro
|
