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Searched refs:FSL_FEATURE_L1DCACHE_LINESIZE_BYTE (Results 1 – 25 of 107) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/drivers/dcp/
Dfsl_dcp.c116 while (0U != ((uint32_t)dcpWorkExt & ((uint32_t)FSL_FEATURE_L1DCACHE_LINESIZE_BYTE - 1U))) in DCP_FindCacheLine()
387 uint8_t dcpWorkExt[sizeof(dcp_work_packet_t) + FSL_FEATURE_L1DCACHE_LINESIZE_BYTE] = {0U}; in DCP_AES_EncryptEcb()
485 uint8_t dcpWorkExt[sizeof(dcp_work_packet_t) + FSL_FEATURE_L1DCACHE_LINESIZE_BYTE] = {0U}; in DCP_AES_DecryptEcb()
587 uint8_t dcpWorkExt[sizeof(dcp_work_packet_t) + FSL_FEATURE_L1DCACHE_LINESIZE_BYTE] = {0U}; in DCP_AES_EncryptCbc()
698 uint8_t dcpWorkExt[sizeof(dcp_work_packet_t) + FSL_FEATURE_L1DCACHE_LINESIZE_BYTE] = {0U}; in DCP_AES_DecryptCbc()
1032 uint8_t dcpWorkExt[sizeof(dcp_work_packet_t) + FSL_FEATURE_L1DCACHE_LINESIZE_BYTE] = {0U}; in dcp_hash_update()
1208 …ernal = (dcp_hash_ctx_internal_t *)(uint32_t)((uint8_t *)ctx + FSL_FEATURE_L1DCACHE_LINESIZE_BYTE); in DCP_HASH_Init()
1262 …ernal = (dcp_hash_ctx_internal_t *)(uint32_t)((uint8_t *)ctx + FSL_FEATURE_L1DCACHE_LINESIZE_BYTE); in DCP_HASH_Update()
1331 …ernal = (dcp_hash_ctx_internal_t *)(uint32_t)((uint8_t *)ctx + FSL_FEATURE_L1DCACHE_LINESIZE_BYTE); in DCP_HASH_Finish()
/hal_nxp-latest/mcux/middleware/mcux-sdk-middleware-usb/include/
Dusb_misc.h391 #if ((defined(FSL_FEATURE_L2CACHE_LINESIZE_BYTE)) && (defined(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE)))
392 …efine USB_CACHE_LINESIZE MAX(FSL_FEATURE_L2CACHE_LINESIZE_BYTE, FSL_FEATURE_L1DCACHE_LINESIZE_BYTE)
395 #elif (defined(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE))
396 #define USB_CACHE_LINESIZE MAX(0, FSL_FEATURE_L1DCACHE_LINESIZE_BYTE)
/hal_nxp-latest/mcux/mcux-sdk/drivers/common/
Dfsl_common_dsp.h42 #if defined(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE)
43 #define SDK_L1DCACHE_ALIGN(var) SDK_ALIGN(var, FSL_FEATURE_L1DCACHE_LINESIZE_BYTE)
Dfsl_common_arm.h367 #if defined(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE)
368 #define SDK_L1DCACHE_ALIGN(var) SDK_ALIGN(var, FSL_FEATURE_L1DCACHE_LINESIZE_BYTE)
/hal_nxp-latest/mcux/mcux-sdk/cmsis_drivers/enet/
Dfsl_enet_cmsis.c34 #define CMSIS_CACHE_LINESIZE_MAX MAX(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE, FSL_FEATURE_L2CACHE_LINES…
36 #elif defined(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE)
37 #define CMSIS_ENET_BUFF_ALIGNMENT MAX(ENET_BUFF_ALIGNMENT, FSL_FEATURE_L1DCACHE_LINESIZE_BYTE)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM3/
DMIMX8MM3_cm4_features.h226 #define FSL_FEATURE_L1DCACHE_LINESIZE_BYTE (16) macro
/hal_nxp-latest/s32/mcux/devices/S32K146/
DS32K146_features.h180 #define FSL_FEATURE_L1DCACHE_LINESIZE_BYTE (16) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM1/
DMIMX8MM1_cm4_features.h226 #define FSL_FEATURE_L1DCACHE_LINESIZE_BYTE (16) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN6/
DMIMX8MN6_ca53_features.h214 #define FSL_FEATURE_L1DCACHE_LINESIZE_BYTE (64) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM5/
DMIMX8MM5_cm4_features.h226 #define FSL_FEATURE_L1DCACHE_LINESIZE_BYTE (16) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM4/
DMIMX8MM4_cm4_features.h226 #define FSL_FEATURE_L1DCACHE_LINESIZE_BYTE (16) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM2/
DMIMX8MM2_cm4_features.h226 #define FSL_FEATURE_L1DCACHE_LINESIZE_BYTE (16) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM6/
DMIMX8MM6_cm4_features.h226 #define FSL_FEATURE_L1DCACHE_LINESIZE_BYTE (16) macro
DMIMX8MM6_ca53_features.h214 #define FSL_FEATURE_L1DCACHE_LINESIZE_BYTE (64) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ5/
DMIMX8MQ5_cm4_features.h232 #define FSL_FEATURE_L1DCACHE_LINESIZE_BYTE (32) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD7/
DMIMX8MD7_cm4_features.h232 #define FSL_FEATURE_L1DCACHE_LINESIZE_BYTE (32) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD6/
DMIMX8MD6_cm4_features.h232 #define FSL_FEATURE_L1DCACHE_LINESIZE_BYTE (32) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ6/
DMIMX8MQ6_cm4_features.h232 #define FSL_FEATURE_L1DCACHE_LINESIZE_BYTE (32) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ7/
DMIMX8MQ7_cm4_features.h232 #define FSL_FEATURE_L1DCACHE_LINESIZE_BYTE (32) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML8/
DMIMX8ML8_ca53_features.h128 #define FSL_FEATURE_L1DCACHE_LINESIZE_BYTE (64) macro
DMIMX8ML8_dsp_features.h128 #define FSL_FEATURE_L1DCACHE_LINESIZE_BYTE (32) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML3/
DMIMX8ML3_cm7_features.h128 #define FSL_FEATURE_L1DCACHE_LINESIZE_BYTE (32) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML4/
DMIMX8ML4_cm7_features.h128 #define FSL_FEATURE_L1DCACHE_LINESIZE_BYTE (32) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011_features.h579 #define FSL_FEATURE_L1DCACHE_LINESIZE_BYTE (32) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML6/
DMIMX8ML6_cm7_features.h128 #define FSL_FEATURE_L1DCACHE_LINESIZE_BYTE (32) macro

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