| /hal_nxp-latest/s32/drivers/s32k3/Fls/src/ |
| D | Qspi_Ip_Controller.c | 630 if ((baseAddr->FR & QSPI_ERR_FLAGS_MASK) != 0U) in Qspi_Ip_ErrorCheck()
633 baseAddr->FR = QSPI_ERR_FLAGS_MASK; in Qspi_Ip_ErrorCheck()
1412 baseAddr->FR = (uint32)0xFFFFFFFFUL; in Qspi_Ip_ControllerInit()
1986 BaseAddr->FR = (uint32)0x9D83F541UL; in Qspi_Ip_ResetAllRegisters()
2045 BaseAddr->FR = (uint32)0x0C8378C1UL; in Qspi_Ip_ResetAllRegisters()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/qspi/ |
| D | fsl_qspi.h | 427 return base->FR; in QSPI_GetErrorStatusFlags()
437 base->FR = mask; in QSPI_ClearErrorFlag()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/xspi/ |
| D | fsl_xspi.c | 343 tmp32 = base->FR; in XSPI_Init()
346 base->FR = tmp32; in XSPI_Init()
1392 base->FR = XSPI_FR_TBFF_MASK; in XSPI_WriteBlocking()
2290 if ((base->FR & XSPI_FR_PPWF_MASK) != 0UL) in XSPI_UpdatePageWaitTimeCounter()
2360 if ((base->FR & XSPI_FR_PPWF_MASK) != 0UL) in XSPI_SetSFMStatusRegInfo()
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| D | fsl_xspi.h | 1429 base->FR = XSPI_FR_RBDF_MASK; in XSPI_TriggerRxBufferPopEvent()
1464 return (bool)((base->FR & XSPI_FR_RBDF_MASK) == XSPI_FR_RBDF_MASK); in XSPI_CheckRxBufferWaterMarkExceed()
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| /hal_nxp-latest/s32/drivers/s32ze/Mem_EXFLS/src/ |
| D | Qspi_Ip_Controller.c | 632 if ((baseAddr->FR & QSPI_ERR_FLAGS_MASK) != 0U) in Qspi_Ip_ErrorCheck()
635 baseAddr->FR = QSPI_ERR_FLAGS_MASK; in Qspi_Ip_ErrorCheck()
1698 baseAddr->FR = (uint32)0xFFFFFFFFUL; in Qspi_Ip_ControllerInit()
2318 BaseAddr->FR = (uint32)0x9D83FF41UL; in Qspi_Ip_ResetAllRegisters()
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| /hal_nxp-latest/s32/drivers/s32k3/Fls/include/ |
| D | Qspi_Ip_HwAccess.h | 829 BaseAddr->FR = QuadSPI_FR_RBDF_MASK; in Qspi_Ip_RxPop()
909 BaseAddr->FR = Mask; in Qspi_Ip_ClearIntFlag()
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| /hal_nxp-latest/s32/drivers/s32ze/Mem_EXFLS/include/ |
| D | Qspi_Ip_HwAccess.h | 1150 BaseAddr->FR = QuadSPI_FR_RBDF_MASK; in Qspi_Ip_RxPop()
1233 BaseAddr->FR = Mask; in Qspi_Ip_ClearIntFlag()
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| /hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/ |
| D | S32K148_QUADSPI.h | 102 __IO uint32_t FR; /**< Flag Register, offset: 0x160 */ member
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| /hal_nxp-latest/s32/drivers/s32k3/BaseNXP/header/ |
| D | S32K344_QUADSPI.h | 108 __IO uint32_t FR; /**< Flag Register, offset: 0x160 */ member
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| /hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/ |
| D | S32Z2_CTU.h | 100 …__I uint32_t FR[CTU_FR_COUNT]; /**< FIFO Right Aligned Data Register, array offs… member
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| D | S32Z2_QUADSPI.h | 118 __IO uint32_t FR; /**< Flag Register, offset: 0x160 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK80F25615/ |
| D | MK80F25615.h | 18280 __IO uint32_t FR; /**< Flag Register, offset: 0x160 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK82F25615/ |
| D | MK82F25615.h | 19253 __IO uint32_t FR; /**< Flag Register, offset: 0x160 */ member
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| /hal_nxp-latest/imx/devices/MCIMX6X/ |
| D | MCIMX6X_M4.h | 30438 __IO uint32_t FR; /**< Flag Register, offset: 0x160 */ member
30484 #define QuadSPI_FR_REG(base) ((base)->FR)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK28FA15/ |
| D | MK28FA15.h | 17784 __IO uint32_t FR; /**< Flag Register, offset: 0x160 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK27FA15/ |
| D | MK27FA15.h | 17782 __IO uint32_t FR; /**< Flag Register, offset: 0x160 */ member
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| /hal_nxp-latest/imx/devices/MCIMX7D/ |
| D | MCIMX7D_M4.h | 37636 __IO uint32_t FR; /**< Flag Register, offset: 0x160 */ member
37682 #define QuadSPI_FR_REG(base) ((base)->FR)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U3/ |
| D | MCIMX7U3_cm4.h | 27229 __IO uint32_t FR; /**< Flag Register, offset: 0x160 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U5/ |
| D | MCIMX7U5_cm4.h | 27230 __IO uint32_t FR; /**< Flag Register, offset: 0x160 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/ |
| D | MIMXRT735S_hifi1.h | 63496 __IO uint32_t FR; /**< Flag, offset: 0x160 */ member
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| D | MIMXRT735S_cm33_core1.h | 63565 __IO uint32_t FR; /**< Flag, offset: 0x160 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ5/ |
| D | MIMX8MQ5_cm4.h | 44012 __IO uint32_t FR; /**< Flag Register, offset: 0x160 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/ |
| D | MIMXRT758S_cm33_core1.h | 66788 __IO uint32_t FR; /**< Flag, offset: 0x160 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD7/ |
| D | MIMX8MD7_cm4.h | 46185 __IO uint32_t FR; /**< Flag Register, offset: 0x160 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD6/ |
| D | MIMX8MD6_cm4.h | 46185 __IO uint32_t FR; /**< Flag Register, offset: 0x160 */ member
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