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Searched refs:FLEXSPI_IPTXFCR_CLRIPTXF_MASK (Results 1 – 25 of 95) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/drivers/flexspi/
Dfsl_flexspi.c855 base->IPTXFCR |= FLEXSPI_IPTXFCR_CLRIPTXF_MASK; in FLEXSPI_TransferBlocking()
979 base->IPTXFCR |= FLEXSPI_IPTXFCR_CLRIPTXF_MASK; in FLEXSPI_TransferNonBlocking()
Dfsl_flexspi_edma.c193 base->IPTXFCR |= FLEXSPI_IPTXFCR_CLRIPTXF_MASK; in FLEXSPI_TransferEDMA()
Dfsl_flexspi.h563 base->IPTXFCR |= FLEXSPI_IPTXFCR_CLRIPTXF_MASK; in FLEXSPI_ResetFifos()
Dfsl_flexspi_dma.c544 base->IPTXFCR |= FLEXSPI_IPTXFCR_CLRIPTXF_MASK; in FLEXSPI_TransferDMA()
/hal_nxp-latest/mcux/mcux-sdk/drivers/flexspi/flexspi_dma3/
Dfsl_flexspi_edma.c209 base->IPTXFCR |= FLEXSPI_IPTXFCR_CLRIPTXF_MASK; in FLEXSPI_TransferEDMA()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h7772 #define FLEXSPI_IPTXFCR_CLRIPTXF_MASK (0x1U) macro
7775 … (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFCR_CLRIPTXF_SHIFT)) & FLEXSPI_IPTXFCR_CLRIPTXF_MASK)
DMIMXRT685S_cm33.h13749 #define FLEXSPI_IPTXFCR_CLRIPTXF_MASK (0x1U) macro
13752 … (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFCR_CLRIPTXF_SHIFT)) & FLEXSPI_IPTXFCR_CLRIPTXF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h14067 #define FLEXSPI_IPTXFCR_CLRIPTXF_MASK (0x1U) macro
14070 … (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFCR_CLRIPTXF_SHIFT)) & FLEXSPI_IPTXFCR_CLRIPTXF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h16561 #define FLEXSPI_IPTXFCR_CLRIPTXF_MASK (0x1U) macro
16564 … (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFCR_CLRIPTXF_SHIFT)) & FLEXSPI_IPTXFCR_CLRIPTXF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h13749 #define FLEXSPI_IPTXFCR_CLRIPTXF_MASK (0x1U) macro
13752 … (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFCR_CLRIPTXF_SHIFT)) & FLEXSPI_IPTXFCR_CLRIPTXF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h13733 #define FLEXSPI_IPTXFCR_CLRIPTXF_MASK (0x1U) macro
13739 … (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFCR_CLRIPTXF_SHIFT)) & FLEXSPI_IPTXFCR_CLRIPTXF_MASK)
DMIMXRT595S_cm33.h20331 #define FLEXSPI_IPTXFCR_CLRIPTXF_MASK (0x1U) macro
20337 … (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFCR_CLRIPTXF_SHIFT)) & FLEXSPI_IPTXFCR_CLRIPTXF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h19880 #define FLEXSPI_IPTXFCR_CLRIPTXF_MASK (0x1U) macro
19883 … (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFCR_CLRIPTXF_SHIFT)) & FLEXSPI_IPTXFCR_CLRIPTXF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5536/
DLPC5536.h14277 #define FLEXSPI_IPTXFCR_CLRIPTXF_MASK (0x1U) macro
14283 … (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFCR_CLRIPTXF_SHIFT)) & FLEXSPI_IPTXFCR_CLRIPTXF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5534/
DLPC5534.h14277 #define FLEXSPI_IPTXFCR_CLRIPTXF_MASK (0x1U) macro
14283 … (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFCR_CLRIPTXF_SHIFT)) & FLEXSPI_IPTXFCR_CLRIPTXF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h19900 #define FLEXSPI_IPTXFCR_CLRIPTXF_MASK (0x1U) macro
19903 … (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFCR_CLRIPTXF_SHIFT)) & FLEXSPI_IPTXFCR_CLRIPTXF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h20840 #define FLEXSPI_IPTXFCR_CLRIPTXF_MASK (0x1U) macro
20843 … (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFCR_CLRIPTXF_SHIFT)) & FLEXSPI_IPTXFCR_CLRIPTXF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h22016 #define FLEXSPI_IPTXFCR_CLRIPTXF_MASK (0x1U) macro
22019 … (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFCR_CLRIPTXF_SHIFT)) & FLEXSPI_IPTXFCR_CLRIPTXF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h21625 #define FLEXSPI_IPTXFCR_CLRIPTXF_MASK (0x1U) macro
21628 … (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFCR_CLRIPTXF_SHIFT)) & FLEXSPI_IPTXFCR_CLRIPTXF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h22018 #define FLEXSPI_IPTXFCR_CLRIPTXF_MASK (0x1U) macro
22021 … (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFCR_CLRIPTXF_SHIFT)) & FLEXSPI_IPTXFCR_CLRIPTXF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h20327 #define FLEXSPI_IPTXFCR_CLRIPTXF_MASK (0x1U) macro
20333 … (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFCR_CLRIPTXF_SHIFT)) & FLEXSPI_IPTXFCR_CLRIPTXF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h22394 #define FLEXSPI_IPTXFCR_CLRIPTXF_MASK (0x1U) macro
22397 … (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFCR_CLRIPTXF_SHIFT)) & FLEXSPI_IPTXFCR_CLRIPTXF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h20330 #define FLEXSPI_IPTXFCR_CLRIPTXF_MASK (0x1U) macro
20336 … (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFCR_CLRIPTXF_SHIFT)) & FLEXSPI_IPTXFCR_CLRIPTXF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h23245 #define FLEXSPI_IPTXFCR_CLRIPTXF_MASK (0x1U) macro
23248 … (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFCR_CLRIPTXF_SHIFT)) & FLEXSPI_IPTXFCR_CLRIPTXF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S36/
DLPC55S36.h14276 #define FLEXSPI_IPTXFCR_CLRIPTXF_MASK (0x1U) macro
14282 … (((uint32_t)(((uint32_t)(x)) << FLEXSPI_IPTXFCR_CLRIPTXF_SHIFT)) & FLEXSPI_IPTXFCR_CLRIPTXF_MASK)

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