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Searched refs:FLEXSPI_IPEDCTX0END_end_address_MASK (Results 1 – 11 of 11) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5536/
DLPC5536.h14768 #define FLEXSPI_IPEDCTX0END_end_address_MASK (0xFFFFFF00U) macro
14771 …(((uint32_t)(x)) << FLEXSPI_IPEDCTX0END_end_address_SHIFT)) & FLEXSPI_IPEDCTX0END_end_address_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5534/
DLPC5534.h14768 #define FLEXSPI_IPEDCTX0END_end_address_MASK (0xFFFFFF00U) macro
14771 …(((uint32_t)(x)) << FLEXSPI_IPEDCTX0END_end_address_SHIFT)) & FLEXSPI_IPEDCTX0END_end_address_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S36/
DLPC55S36.h14767 #define FLEXSPI_IPEDCTX0END_end_address_MASK (0xFFFFFF00U) macro
14770 …(((uint32_t)(x)) << FLEXSPI_IPEDCTX0END_end_address_SHIFT)) & FLEXSPI_IPEDCTX0END_end_address_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h24269 #define FLEXSPI_IPEDCTX0END_end_address_MASK (0xFFFFFF00U) macro
24272 …(((uint32_t)(x)) << FLEXSPI_IPEDCTX0END_end_address_SHIFT)) & FLEXSPI_IPEDCTX0END_end_address_MASK)
DMCXN546_cm33_core1.h24269 #define FLEXSPI_IPEDCTX0END_end_address_MASK (0xFFFFFF00U) macro
24272 …(((uint32_t)(x)) << FLEXSPI_IPEDCTX0END_end_address_SHIFT)) & FLEXSPI_IPEDCTX0END_end_address_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h24269 #define FLEXSPI_IPEDCTX0END_end_address_MASK (0xFFFFFF00U) macro
24272 …(((uint32_t)(x)) << FLEXSPI_IPEDCTX0END_end_address_SHIFT)) & FLEXSPI_IPEDCTX0END_end_address_MASK)
DMCXN547_cm33_core1.h24269 #define FLEXSPI_IPEDCTX0END_end_address_MASK (0xFFFFFF00U) macro
24272 …(((uint32_t)(x)) << FLEXSPI_IPEDCTX0END_end_address_SHIFT)) & FLEXSPI_IPEDCTX0END_end_address_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h24315 #define FLEXSPI_IPEDCTX0END_end_address_MASK (0xFFFFFF00U) macro
24318 …(((uint32_t)(x)) << FLEXSPI_IPEDCTX0END_end_address_SHIFT)) & FLEXSPI_IPEDCTX0END_end_address_MASK)
DMCXN947_cm33_core0.h24315 #define FLEXSPI_IPEDCTX0END_end_address_MASK (0xFFFFFF00U) macro
24318 …(((uint32_t)(x)) << FLEXSPI_IPEDCTX0END_end_address_SHIFT)) & FLEXSPI_IPEDCTX0END_end_address_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h24315 #define FLEXSPI_IPEDCTX0END_end_address_MASK (0xFFFFFF00U) macro
24318 …(((uint32_t)(x)) << FLEXSPI_IPEDCTX0END_end_address_SHIFT)) & FLEXSPI_IPEDCTX0END_end_address_MASK)
DMCXN946_cm33_core1.h24315 #define FLEXSPI_IPEDCTX0END_end_address_MASK (0xFFFFFF00U) macro
24318 …(((uint32_t)(x)) << FLEXSPI_IPEDCTX0END_end_address_SHIFT)) & FLEXSPI_IPEDCTX0END_end_address_MASK)