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Searched refs:FLEXSPI_FLSHCR4_SCKRSTDISABLED_MASK (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/
DMIMX8QM6_ca53.h25440 #define FLEXSPI_FLSHCR4_SCKRSTDISABLED_MASK (0x10U) macro
25446 …t)(((uint32_t)(x)) << FLEXSPI_FLSHCR4_SCKRSTDISABLED_SHIFT)) & FLEXSPI_FLSHCR4_SCKRSTDISABLED_MASK)
DMIMX8QM6_dsp.h28267 #define FLEXSPI_FLSHCR4_SCKRSTDISABLED_MASK (0x10U) macro
28273 …t)(((uint32_t)(x)) << FLEXSPI_FLSHCR4_SCKRSTDISABLED_SHIFT)) & FLEXSPI_FLSHCR4_SCKRSTDISABLED_MASK)
DMIMX8QM6_cm4_core1.h20233 #define FLEXSPI_FLSHCR4_SCKRSTDISABLED_MASK (0x10U) macro
20239 …t)(((uint32_t)(x)) << FLEXSPI_FLSHCR4_SCKRSTDISABLED_SHIFT)) & FLEXSPI_FLSHCR4_SCKRSTDISABLED_MASK)
DMIMX8QM6_cm4_core0.h20233 #define FLEXSPI_FLSHCR4_SCKRSTDISABLED_MASK (0x10U) macro
20239 …t)(((uint32_t)(x)) << FLEXSPI_FLSHCR4_SCKRSTDISABLED_SHIFT)) & FLEXSPI_FLSHCR4_SCKRSTDISABLED_MASK)