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Searched refs:FLEXSPIFCLKDIV (Results 1 – 15 of 15) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt685/
Dclock_config.c72 CLKCTL0->FLEXSPIFCLKDIV |= CLKCTL0_FLEXSPIFCLKDIV_RESET_MASK; /* Reset the divider counter */ in BOARD_SetFlexspiClock()
73 CLKCTL0->FLEXSPIFCLKDIV = CLKCTL0_FLEXSPIFCLKDIV_DIV(divider - 1); in BOARD_SetFlexspiClock()
74 while ((CLKCTL0->FLEXSPIFCLKDIV) & CLKCTL0_FLEXSPIFCLKDIV_REQFLAG_MASK) in BOARD_SetFlexspiClock()
Dboard.c376 ((CLKCTL0->FLEXSPIFCLKDIV & CLKCTL0_FLEXSPIFCLKDIV_DIV_MASK) != (divider - 1))) in BOARD_SetFlexspiClock()
386 … CLKCTL0->FLEXSPIFCLKDIV |= CLKCTL0_FLEXSPIFCLKDIV_RESET_MASK; /* Reset the divider counter */ in BOARD_SetFlexspiClock()
387 CLKCTL0->FLEXSPIFCLKDIV = CLKCTL0_FLEXSPIFCLKDIV_DIV(divider - 1); in BOARD_SetFlexspiClock()
388 while ((CLKCTL0->FLEXSPIFCLKDIV) & CLKCTL0_FLEXSPIFCLKDIV_REQFLAG_MASK) in BOARD_SetFlexspiClock()
/hal_nxp-latest/mcux/mcux-sdk/boards/mimxrt685audevk/
Dclock_config.c72 CLKCTL0->FLEXSPIFCLKDIV |= CLKCTL0_FLEXSPIFCLKDIV_RESET_MASK; /* Reset the divider counter */ in BOARD_SetFlexspiClock()
73 CLKCTL0->FLEXSPIFCLKDIV = CLKCTL0_FLEXSPIFCLKDIV_DIV(divider - 1); in BOARD_SetFlexspiClock()
74 while ((CLKCTL0->FLEXSPIFCLKDIV) & CLKCTL0_FLEXSPIFCLKDIV_REQFLAG_MASK) in BOARD_SetFlexspiClock()
Dboard.c369 ((CLKCTL0->FLEXSPIFCLKDIV & CLKCTL0_FLEXSPIFCLKDIV_DIV_MASK) != (divider - 1))) in BOARD_SetFlexspiClock()
379 … CLKCTL0->FLEXSPIFCLKDIV |= CLKCTL0_FLEXSPIFCLKDIV_RESET_MASK; /* Reset the divider counter */ in BOARD_SetFlexspiClock()
380 CLKCTL0->FLEXSPIFCLKDIV = CLKCTL0_FLEXSPIFCLKDIV_DIV(divider - 1); in BOARD_SetFlexspiClock()
381 while ((CLKCTL0->FLEXSPIFCLKDIV) & CLKCTL0_FLEXSPIFCLKDIV_REQFLAG_MASK) in BOARD_SetFlexspiClock()
/hal_nxp-latest/mcux/mcux-sdk/boards/frdmrw612/
Dboard.c286 ((CLKCTL0->FLEXSPIFCLKDIV & CLKCTL0_FLEXSPIFCLKDIV_DIV_MASK) != (divider - 1))) in BOARD_SetFlexspiClock()
297 … CLKCTL0->FLEXSPIFCLKDIV |= CLKCTL0_FLEXSPIFCLKDIV_RESET_MASK; /* Reset the divider counter */ in BOARD_SetFlexspiClock()
298 CLKCTL0->FLEXSPIFCLKDIV = CLKCTL0_FLEXSPIFCLKDIV_DIV(divider - 1); in BOARD_SetFlexspiClock()
299 while ((CLKCTL0->FLEXSPIFCLKDIV) & CLKCTL0_FLEXSPIFCLKDIV_REQFLAG_MASK) in BOARD_SetFlexspiClock()
/hal_nxp-latest/mcux/mcux-sdk/boards/rdrw612bga/
Dboard.c379 ((CLKCTL0->FLEXSPIFCLKDIV & CLKCTL0_FLEXSPIFCLKDIV_DIV_MASK) != (divider - 1))) in BOARD_SetFlexspiClock()
390 … CLKCTL0->FLEXSPIFCLKDIV |= CLKCTL0_FLEXSPIFCLKDIV_RESET_MASK; /* Reset the divider counter */ in BOARD_SetFlexspiClock()
391 CLKCTL0->FLEXSPIFCLKDIV = CLKCTL0_FLEXSPIFCLKDIV_DIV(divider - 1); in BOARD_SetFlexspiClock()
392 while ((CLKCTL0->FLEXSPIFCLKDIV) & CLKCTL0_FLEXSPIFCLKDIV_REQFLAG_MASK) in BOARD_SetFlexspiClock()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/drivers/
Dfsl_clock.c729 return freq / ((CLKCTL0->FLEXSPIFCLKDIV & CLKCTL0_FLEXSPIFCLKDIV_DIV_MASK) + 1U); in CLOCK_GetFlexspiClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/drivers/
Dfsl_clock.c729 return freq / ((CLKCTL0->FLEXSPIFCLKDIV & CLKCTL0_FLEXSPIFCLKDIV_DIV_MASK) + 1U); in CLOCK_GetFlexspiClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/RW612/drivers/
Dfsl_clock.c1046 return freq / ((CLKCTL0->FLEXSPIFCLKDIV & CLKCTL0_FLEXSPIFCLKDIV_DIV_MASK) + 1U); in CLOCK_GetFlexspiClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/RW610/drivers/
Dfsl_clock.c1046 return freq / ((CLKCTL0->FLEXSPIFCLKDIV & CLKCTL0_FLEXSPIFCLKDIV_DIV_MASK) + 1U); in CLOCK_GetFlexspiClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h1272 __IO uint32_t FLEXSPIFCLKDIV; /**< FlexSPI FCLK divider, offset: 0x624 */ member
DMIMXRT685S_cm33.h6983 __IO uint32_t FLEXSPIFCLKDIV; /**< FlexSPI FCLK divider, offset: 0x624 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h6983 __IO uint32_t FLEXSPIFCLKDIV; /**< FlexSPI FCLK divider, offset: 0x624 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/RW610/
DRW610.h19981 __IO uint32_t FLEXSPIFCLKDIV; /**< FlexSPI FCLK divider, offset: 0x624 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/RW612/
DRW612.h19981 __IO uint32_t FLEXSPIFCLKDIV; /**< FlexSPI FCLK divider, offset: 0x624 */ member