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Searched refs:FLASH_NMPA_BASE (Results 1 – 25 of 35) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5506CPXXXX/drivers/
Dfsl_power.c292 #define GET_16MXO_TRIM() (*(uint32_t *)(FLASH_NMPA_BASE + 0xC8U)) // (0x3FCC8)
293 #define GET_32KXO_TRIM() (*(uint32_t *)(FLASH_NMPA_BASE + 0xCCU)) // (0x3FCCC)
336 #define DCDC_POWER_PROFILE_LOW_0_ADDRS (FLASH_NMPA_BASE + 0xE0U) in lf_set_dcdc_power_profile_low()
337 #define DCDC_POWER_PROFILE_LOW_1_ADDRS (FLASH_NMPA_BASE + 0xE4U) in lf_set_dcdc_power_profile_low()
741 #define FLASH_NMPA_LDO_AO_ADDRS (FLASH_NMPA_BASE + 0x0F4U) in lf_set_ldo_ao_ldo_mem_voltage()
1215 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_0_ADDRS (FLASH_NMPA_BASE + 0xE0U) in lowpower_set_dcdc_power_profile()
1216 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_1_ADDRS (FLASH_NMPA_BASE + 0xE4U) in lowpower_set_dcdc_power_profile()
1217 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_0_ADDRS (FLASH_NMPA_BASE + 0xE8U) in lowpower_set_dcdc_power_profile()
1218 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_1_ADDRS (FLASH_NMPA_BASE + 0xECU) in lowpower_set_dcdc_power_profile()
1219 #define FLASH_NMPA_DCDC_POWER_PROFILE_HIGH_0_ADDRS (FLASH_NMPA_BASE + 0xD8U) in lowpower_set_dcdc_power_profile()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5506/drivers/
Dfsl_power.c292 #define GET_16MXO_TRIM() (*(uint32_t *)(FLASH_NMPA_BASE + 0xC8U)) // (0x3FCC8)
293 #define GET_32KXO_TRIM() (*(uint32_t *)(FLASH_NMPA_BASE + 0xCCU)) // (0x3FCCC)
336 #define DCDC_POWER_PROFILE_LOW_0_ADDRS (FLASH_NMPA_BASE + 0xE0U) in lf_set_dcdc_power_profile_low()
337 #define DCDC_POWER_PROFILE_LOW_1_ADDRS (FLASH_NMPA_BASE + 0xE4U) in lf_set_dcdc_power_profile_low()
741 #define FLASH_NMPA_LDO_AO_ADDRS (FLASH_NMPA_BASE + 0x0F4U) in lf_set_ldo_ao_ldo_mem_voltage()
1215 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_0_ADDRS (FLASH_NMPA_BASE + 0xE0U) in lowpower_set_dcdc_power_profile()
1216 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_1_ADDRS (FLASH_NMPA_BASE + 0xE4U) in lowpower_set_dcdc_power_profile()
1217 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_0_ADDRS (FLASH_NMPA_BASE + 0xE8U) in lowpower_set_dcdc_power_profile()
1218 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_1_ADDRS (FLASH_NMPA_BASE + 0xECU) in lowpower_set_dcdc_power_profile()
1219 #define FLASH_NMPA_DCDC_POWER_PROFILE_HIGH_0_ADDRS (FLASH_NMPA_BASE + 0xD8U) in lowpower_set_dcdc_power_profile()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5516/drivers/
Dfsl_power.c292 #define GET_16MXO_TRIM() (*(uint32_t *)(FLASH_NMPA_BASE + 0xC8U)) // (0x3FCC8)
293 #define GET_32KXO_TRIM() (*(uint32_t *)(FLASH_NMPA_BASE + 0xCCU)) // (0x3FCCC)
337 #define DCDC_POWER_PROFILE_LOW_0_ADDRS (FLASH_NMPA_BASE + 0xE0U) // N4M (0x3FCE0U) / N4S (0x9FCE0U) in lf_set_dcdc_power_profile_low()
338 #define DCDC_POWER_PROFILE_LOW_1_ADDRS (FLASH_NMPA_BASE + 0xE4U) // N4M (0x3FCE4U) / N4S (0x9FCE4U) in lf_set_dcdc_power_profile_low()
809 #define FLASH_NMPA_LDO_AO_ADDRS (FLASH_NMPA_BASE + 0x0F4U) // N4M (0x3FCF4U) / N4S (… in lf_set_ldo_ao_ldo_mem_voltage()
1283 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_0_ADDRS (FLASH_NMPA_BASE + 0xE0U) in lowpower_set_dcdc_power_profile()
1284 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_1_ADDRS (FLASH_NMPA_BASE + 0xE4U) in lowpower_set_dcdc_power_profile()
1285 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_0_ADDRS (FLASH_NMPA_BASE + 0xE8U) in lowpower_set_dcdc_power_profile()
1286 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_1_ADDRS (FLASH_NMPA_BASE + 0xECU) in lowpower_set_dcdc_power_profile()
1287 #define FLASH_NMPA_DCDC_POWER_PROFILE_HIGH_0_ADDRS (FLASH_NMPA_BASE + 0xD8U) in lowpower_set_dcdc_power_profile()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S14/drivers/
Dfsl_power.c292 #define GET_16MXO_TRIM() (*(uint32_t *)(FLASH_NMPA_BASE + 0xC8U)) // (0x3FCC8)
293 #define GET_32KXO_TRIM() (*(uint32_t *)(FLASH_NMPA_BASE + 0xCCU)) // (0x3FCCC)
337 #define DCDC_POWER_PROFILE_LOW_0_ADDRS (FLASH_NMPA_BASE + 0xE0U) // N4M (0x3FCE0U) / N4S (0x9FCE0U) in lf_set_dcdc_power_profile_low()
338 #define DCDC_POWER_PROFILE_LOW_1_ADDRS (FLASH_NMPA_BASE + 0xE4U) // N4M (0x3FCE4U) / N4S (0x9FCE4U) in lf_set_dcdc_power_profile_low()
809 #define FLASH_NMPA_LDO_AO_ADDRS (FLASH_NMPA_BASE + 0x0F4U) // N4M (0x3FCF4U) / N4S (… in lf_set_ldo_ao_ldo_mem_voltage()
1283 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_0_ADDRS (FLASH_NMPA_BASE + 0xE0U) in lowpower_set_dcdc_power_profile()
1284 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_1_ADDRS (FLASH_NMPA_BASE + 0xE4U) in lowpower_set_dcdc_power_profile()
1285 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_0_ADDRS (FLASH_NMPA_BASE + 0xE8U) in lowpower_set_dcdc_power_profile()
1286 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_1_ADDRS (FLASH_NMPA_BASE + 0xECU) in lowpower_set_dcdc_power_profile()
1287 #define FLASH_NMPA_DCDC_POWER_PROFILE_HIGH_0_ADDRS (FLASH_NMPA_BASE + 0xD8U) in lowpower_set_dcdc_power_profile()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5512/drivers/
Dfsl_power.c292 #define GET_16MXO_TRIM() (*(uint32_t *)(FLASH_NMPA_BASE + 0xC8U)) // (0x3FCC8)
293 #define GET_32KXO_TRIM() (*(uint32_t *)(FLASH_NMPA_BASE + 0xCCU)) // (0x3FCCC)
337 #define DCDC_POWER_PROFILE_LOW_0_ADDRS (FLASH_NMPA_BASE + 0xE0U) // N4M (0x3FCE0U) / N4S (0x9FCE0U) in lf_set_dcdc_power_profile_low()
338 #define DCDC_POWER_PROFILE_LOW_1_ADDRS (FLASH_NMPA_BASE + 0xE4U) // N4M (0x3FCE4U) / N4S (0x9FCE4U) in lf_set_dcdc_power_profile_low()
809 #define FLASH_NMPA_LDO_AO_ADDRS (FLASH_NMPA_BASE + 0x0F4U) // N4M (0x3FCF4U) / N4S (… in lf_set_ldo_ao_ldo_mem_voltage()
1283 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_0_ADDRS (FLASH_NMPA_BASE + 0xE0U) in lowpower_set_dcdc_power_profile()
1284 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_1_ADDRS (FLASH_NMPA_BASE + 0xE4U) in lowpower_set_dcdc_power_profile()
1285 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_0_ADDRS (FLASH_NMPA_BASE + 0xE8U) in lowpower_set_dcdc_power_profile()
1286 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_1_ADDRS (FLASH_NMPA_BASE + 0xECU) in lowpower_set_dcdc_power_profile()
1287 #define FLASH_NMPA_DCDC_POWER_PROFILE_HIGH_0_ADDRS (FLASH_NMPA_BASE + 0xD8U) in lowpower_set_dcdc_power_profile()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S04/drivers/
Dfsl_power.c292 #define GET_16MXO_TRIM() (*(uint32_t *)(FLASH_NMPA_BASE + 0xC8U)) // (0x3FCC8)
293 #define GET_32KXO_TRIM() (*(uint32_t *)(FLASH_NMPA_BASE + 0xCCU)) // (0x3FCCC)
336 #define DCDC_POWER_PROFILE_LOW_0_ADDRS (FLASH_NMPA_BASE + 0xE0U) in lf_set_dcdc_power_profile_low()
337 #define DCDC_POWER_PROFILE_LOW_1_ADDRS (FLASH_NMPA_BASE + 0xE4U) in lf_set_dcdc_power_profile_low()
759 #define FLASH_NMPA_LDO_AO_ADDRS (FLASH_NMPA_BASE + 0x0F4U) in lf_set_ldo_ao_ldo_mem_voltage()
1233 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_0_ADDRS (FLASH_NMPA_BASE + 0xE0U) in lowpower_set_dcdc_power_profile()
1234 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_1_ADDRS (FLASH_NMPA_BASE + 0xE4U) in lowpower_set_dcdc_power_profile()
1235 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_0_ADDRS (FLASH_NMPA_BASE + 0xE8U) in lowpower_set_dcdc_power_profile()
1236 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_1_ADDRS (FLASH_NMPA_BASE + 0xECU) in lowpower_set_dcdc_power_profile()
1237 #define FLASH_NMPA_DCDC_POWER_PROFILE_HIGH_0_ADDRS (FLASH_NMPA_BASE + 0xD8U) in lowpower_set_dcdc_power_profile()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5502/drivers/
Dfsl_power.c292 #define GET_16MXO_TRIM() (*(uint32_t *)(FLASH_NMPA_BASE + 0xC8U)) // (0x3FCC8)
293 #define GET_32KXO_TRIM() (*(uint32_t *)(FLASH_NMPA_BASE + 0xCCU)) // (0x3FCCC)
336 #define DCDC_POWER_PROFILE_LOW_0_ADDRS (FLASH_NMPA_BASE + 0xE0U) in lf_set_dcdc_power_profile_low()
337 #define DCDC_POWER_PROFILE_LOW_1_ADDRS (FLASH_NMPA_BASE + 0xE4U) in lf_set_dcdc_power_profile_low()
741 #define FLASH_NMPA_LDO_AO_ADDRS (FLASH_NMPA_BASE + 0x0F4U) in lf_set_ldo_ao_ldo_mem_voltage()
1215 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_0_ADDRS (FLASH_NMPA_BASE + 0xE0U) in lowpower_set_dcdc_power_profile()
1216 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_1_ADDRS (FLASH_NMPA_BASE + 0xE4U) in lowpower_set_dcdc_power_profile()
1217 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_0_ADDRS (FLASH_NMPA_BASE + 0xE8U) in lowpower_set_dcdc_power_profile()
1218 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_1_ADDRS (FLASH_NMPA_BASE + 0xECU) in lowpower_set_dcdc_power_profile()
1219 #define FLASH_NMPA_DCDC_POWER_PROFILE_HIGH_0_ADDRS (FLASH_NMPA_BASE + 0xD8U) in lowpower_set_dcdc_power_profile()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5502CPXXXX/drivers/
Dfsl_power.c292 #define GET_16MXO_TRIM() (*(uint32_t *)(FLASH_NMPA_BASE + 0xC8U)) // (0x3FCC8)
293 #define GET_32KXO_TRIM() (*(uint32_t *)(FLASH_NMPA_BASE + 0xCCU)) // (0x3FCCC)
336 #define DCDC_POWER_PROFILE_LOW_0_ADDRS (FLASH_NMPA_BASE + 0xE0U) in lf_set_dcdc_power_profile_low()
337 #define DCDC_POWER_PROFILE_LOW_1_ADDRS (FLASH_NMPA_BASE + 0xE4U) in lf_set_dcdc_power_profile_low()
741 #define FLASH_NMPA_LDO_AO_ADDRS (FLASH_NMPA_BASE + 0x0F4U) in lf_set_ldo_ao_ldo_mem_voltage()
1215 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_0_ADDRS (FLASH_NMPA_BASE + 0xE0U) in lowpower_set_dcdc_power_profile()
1216 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_1_ADDRS (FLASH_NMPA_BASE + 0xE4U) in lowpower_set_dcdc_power_profile()
1217 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_0_ADDRS (FLASH_NMPA_BASE + 0xE8U) in lowpower_set_dcdc_power_profile()
1218 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_1_ADDRS (FLASH_NMPA_BASE + 0xECU) in lowpower_set_dcdc_power_profile()
1219 #define FLASH_NMPA_DCDC_POWER_PROFILE_HIGH_0_ADDRS (FLASH_NMPA_BASE + 0xD8U) in lowpower_set_dcdc_power_profile()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5514/drivers/
Dfsl_power.c292 #define GET_16MXO_TRIM() (*(uint32_t *)(FLASH_NMPA_BASE + 0xC8U)) // (0x3FCC8)
293 #define GET_32KXO_TRIM() (*(uint32_t *)(FLASH_NMPA_BASE + 0xCCU)) // (0x3FCCC)
337 #define DCDC_POWER_PROFILE_LOW_0_ADDRS (FLASH_NMPA_BASE + 0xE0U) // N4M (0x3FCE0U) / N4S (0x9FCE0U) in lf_set_dcdc_power_profile_low()
338 #define DCDC_POWER_PROFILE_LOW_1_ADDRS (FLASH_NMPA_BASE + 0xE4U) // N4M (0x3FCE4U) / N4S (0x9FCE4U) in lf_set_dcdc_power_profile_low()
809 #define FLASH_NMPA_LDO_AO_ADDRS (FLASH_NMPA_BASE + 0x0F4U) // N4M (0x3FCF4U) / N4S (… in lf_set_ldo_ao_ldo_mem_voltage()
1283 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_0_ADDRS (FLASH_NMPA_BASE + 0xE0U) in lowpower_set_dcdc_power_profile()
1284 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_1_ADDRS (FLASH_NMPA_BASE + 0xE4U) in lowpower_set_dcdc_power_profile()
1285 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_0_ADDRS (FLASH_NMPA_BASE + 0xE8U) in lowpower_set_dcdc_power_profile()
1286 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_1_ADDRS (FLASH_NMPA_BASE + 0xECU) in lowpower_set_dcdc_power_profile()
1287 #define FLASH_NMPA_DCDC_POWER_PROFILE_HIGH_0_ADDRS (FLASH_NMPA_BASE + 0xD8U) in lowpower_set_dcdc_power_profile()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S06/drivers/
Dfsl_power.c292 #define GET_16MXO_TRIM() (*(uint32_t *)(FLASH_NMPA_BASE + 0xC8U)) // (0x3FCC8)
293 #define GET_32KXO_TRIM() (*(uint32_t *)(FLASH_NMPA_BASE + 0xCCU)) // (0x3FCCC)
336 #define DCDC_POWER_PROFILE_LOW_0_ADDRS (FLASH_NMPA_BASE + 0xE0U) in lf_set_dcdc_power_profile_low()
337 #define DCDC_POWER_PROFILE_LOW_1_ADDRS (FLASH_NMPA_BASE + 0xE4U) in lf_set_dcdc_power_profile_low()
759 #define FLASH_NMPA_LDO_AO_ADDRS (FLASH_NMPA_BASE + 0x0F4U) in lf_set_ldo_ao_ldo_mem_voltage()
1233 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_0_ADDRS (FLASH_NMPA_BASE + 0xE0U) in lowpower_set_dcdc_power_profile()
1234 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_1_ADDRS (FLASH_NMPA_BASE + 0xE4U) in lowpower_set_dcdc_power_profile()
1235 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_0_ADDRS (FLASH_NMPA_BASE + 0xE8U) in lowpower_set_dcdc_power_profile()
1236 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_1_ADDRS (FLASH_NMPA_BASE + 0xECU) in lowpower_set_dcdc_power_profile()
1237 #define FLASH_NMPA_DCDC_POWER_PROFILE_HIGH_0_ADDRS (FLASH_NMPA_BASE + 0xD8U) in lowpower_set_dcdc_power_profile()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S16/drivers/
Dfsl_power.c292 #define GET_16MXO_TRIM() (*(uint32_t *)(FLASH_NMPA_BASE + 0xC8U)) // (0x3FCC8)
293 #define GET_32KXO_TRIM() (*(uint32_t *)(FLASH_NMPA_BASE + 0xCCU)) // (0x3FCCC)
337 #define DCDC_POWER_PROFILE_LOW_0_ADDRS (FLASH_NMPA_BASE + 0xE0U) // N4M (0x3FCE0U) / N4S (0x9FCE0U) in lf_set_dcdc_power_profile_low()
338 #define DCDC_POWER_PROFILE_LOW_1_ADDRS (FLASH_NMPA_BASE + 0xE4U) // N4M (0x3FCE4U) / N4S (0x9FCE4U) in lf_set_dcdc_power_profile_low()
809 #define FLASH_NMPA_LDO_AO_ADDRS (FLASH_NMPA_BASE + 0x0F4U) // N4M (0x3FCF4U) / N4S (… in lf_set_ldo_ao_ldo_mem_voltage()
1283 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_0_ADDRS (FLASH_NMPA_BASE + 0xE0U) in lowpower_set_dcdc_power_profile()
1284 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_1_ADDRS (FLASH_NMPA_BASE + 0xE4U) in lowpower_set_dcdc_power_profile()
1285 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_0_ADDRS (FLASH_NMPA_BASE + 0xE8U) in lowpower_set_dcdc_power_profile()
1286 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_1_ADDRS (FLASH_NMPA_BASE + 0xECU) in lowpower_set_dcdc_power_profile()
1287 #define FLASH_NMPA_DCDC_POWER_PROFILE_HIGH_0_ADDRS (FLASH_NMPA_BASE + 0xD8U) in lowpower_set_dcdc_power_profile()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5504/drivers/
Dfsl_power.c292 #define GET_16MXO_TRIM() (*(uint32_t *)(FLASH_NMPA_BASE + 0xC8U)) // (0x3FCC8)
293 #define GET_32KXO_TRIM() (*(uint32_t *)(FLASH_NMPA_BASE + 0xCCU)) // (0x3FCCC)
336 #define DCDC_POWER_PROFILE_LOW_0_ADDRS (FLASH_NMPA_BASE + 0xE0U) in lf_set_dcdc_power_profile_low()
337 #define DCDC_POWER_PROFILE_LOW_1_ADDRS (FLASH_NMPA_BASE + 0xE4U) in lf_set_dcdc_power_profile_low()
741 #define FLASH_NMPA_LDO_AO_ADDRS (FLASH_NMPA_BASE + 0x0F4U) in lf_set_ldo_ao_ldo_mem_voltage()
1215 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_0_ADDRS (FLASH_NMPA_BASE + 0xE0U) in lowpower_set_dcdc_power_profile()
1216 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_1_ADDRS (FLASH_NMPA_BASE + 0xE4U) in lowpower_set_dcdc_power_profile()
1217 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_0_ADDRS (FLASH_NMPA_BASE + 0xE8U) in lowpower_set_dcdc_power_profile()
1218 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_1_ADDRS (FLASH_NMPA_BASE + 0xECU) in lowpower_set_dcdc_power_profile()
1219 #define FLASH_NMPA_DCDC_POWER_PROFILE_HIGH_0_ADDRS (FLASH_NMPA_BASE + 0xD8U) in lowpower_set_dcdc_power_profile()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5504CPXXXX/drivers/
Dfsl_power.c292 #define GET_16MXO_TRIM() (*(uint32_t *)(FLASH_NMPA_BASE + 0xC8U)) // (0x3FCC8)
293 #define GET_32KXO_TRIM() (*(uint32_t *)(FLASH_NMPA_BASE + 0xCCU)) // (0x3FCCC)
336 #define DCDC_POWER_PROFILE_LOW_0_ADDRS (FLASH_NMPA_BASE + 0xE0U) in lf_set_dcdc_power_profile_low()
337 #define DCDC_POWER_PROFILE_LOW_1_ADDRS (FLASH_NMPA_BASE + 0xE4U) in lf_set_dcdc_power_profile_low()
741 #define FLASH_NMPA_LDO_AO_ADDRS (FLASH_NMPA_BASE + 0x0F4U) in lf_set_ldo_ao_ldo_mem_voltage()
1215 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_0_ADDRS (FLASH_NMPA_BASE + 0xE0U) in lowpower_set_dcdc_power_profile()
1216 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_1_ADDRS (FLASH_NMPA_BASE + 0xE4U) in lowpower_set_dcdc_power_profile()
1217 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_0_ADDRS (FLASH_NMPA_BASE + 0xE8U) in lowpower_set_dcdc_power_profile()
1218 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_1_ADDRS (FLASH_NMPA_BASE + 0xECU) in lowpower_set_dcdc_power_profile()
1219 #define FLASH_NMPA_DCDC_POWER_PROFILE_HIGH_0_ADDRS (FLASH_NMPA_BASE + 0xD8U) in lowpower_set_dcdc_power_profile()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S66/drivers/
Dfsl_power.c1191 #define FLASH_NMPA_BASE (0x9FC00u) in lowpower_set_dcdc_power_profile() macro
1192 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_0_ADDRS (FLASH_NMPA_BASE + 0xE0U) // (0x9FCE0U) in lowpower_set_dcdc_power_profile()
1193 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_1_ADDRS (FLASH_NMPA_BASE + 0xE4U) // (0x9FCE4U) in lowpower_set_dcdc_power_profile()
1194 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_0_ADDRS (FLASH_NMPA_BASE + 0xE8U) // (0x9FCE8U) in lowpower_set_dcdc_power_profile()
1195 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_1_ADDRS (FLASH_NMPA_BASE + 0xECU) // (0x9FCECU) in lowpower_set_dcdc_power_profile()
1196 #define FLASH_NMPA_DCDC_POWER_PROFILE_HIGH_0_ADDRS (FLASH_NMPA_BASE + 0xD8U) // (0x9FCD8U) in lowpower_set_dcdc_power_profile()
1197 #define FLASH_NMPA_DCDC_POWER_PROFILE_HIGH_1_ADDRS (FLASH_NMPA_BASE + 0xDCU) // (0x9FCDCU) in lowpower_set_dcdc_power_profile()
1288 #define FLASH_NMPA_PVT_MONITOR_0_RINGO_ADDRS (FLASH_NMPA_BASE + 0x130U) in lowpower_get_part_process_corner()
1289 #define FLASH_NMPA_PVT_MONITOR_1_RINGO_ADDRS (FLASH_NMPA_BASE + 0x140U) in lowpower_get_part_process_corner()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5526/drivers/
Dfsl_power.c1191 #define FLASH_NMPA_BASE (0x9FC00u) in lowpower_set_dcdc_power_profile() macro
1192 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_0_ADDRS (FLASH_NMPA_BASE + 0xE0U) // (0x9FCE0U) in lowpower_set_dcdc_power_profile()
1193 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_1_ADDRS (FLASH_NMPA_BASE + 0xE4U) // (0x9FCE4U) in lowpower_set_dcdc_power_profile()
1194 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_0_ADDRS (FLASH_NMPA_BASE + 0xE8U) // (0x9FCE8U) in lowpower_set_dcdc_power_profile()
1195 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_1_ADDRS (FLASH_NMPA_BASE + 0xECU) // (0x9FCECU) in lowpower_set_dcdc_power_profile()
1196 #define FLASH_NMPA_DCDC_POWER_PROFILE_HIGH_0_ADDRS (FLASH_NMPA_BASE + 0xD8U) // (0x9FCD8U) in lowpower_set_dcdc_power_profile()
1197 #define FLASH_NMPA_DCDC_POWER_PROFILE_HIGH_1_ADDRS (FLASH_NMPA_BASE + 0xDCU) // (0x9FCDCU) in lowpower_set_dcdc_power_profile()
1288 #define FLASH_NMPA_PVT_MONITOR_0_RINGO_ADDRS (FLASH_NMPA_BASE + 0x130U) in lowpower_get_part_process_corner()
1289 #define FLASH_NMPA_PVT_MONITOR_1_RINGO_ADDRS (FLASH_NMPA_BASE + 0x140U) in lowpower_get_part_process_corner()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S28/drivers/
Dfsl_power.c1191 #define FLASH_NMPA_BASE (0x9FC00u) in lowpower_set_dcdc_power_profile() macro
1192 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_0_ADDRS (FLASH_NMPA_BASE + 0xE0U) // (0x9FCE0U) in lowpower_set_dcdc_power_profile()
1193 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_1_ADDRS (FLASH_NMPA_BASE + 0xE4U) // (0x9FCE4U) in lowpower_set_dcdc_power_profile()
1194 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_0_ADDRS (FLASH_NMPA_BASE + 0xE8U) // (0x9FCE8U) in lowpower_set_dcdc_power_profile()
1195 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_1_ADDRS (FLASH_NMPA_BASE + 0xECU) // (0x9FCECU) in lowpower_set_dcdc_power_profile()
1196 #define FLASH_NMPA_DCDC_POWER_PROFILE_HIGH_0_ADDRS (FLASH_NMPA_BASE + 0xD8U) // (0x9FCD8U) in lowpower_set_dcdc_power_profile()
1197 #define FLASH_NMPA_DCDC_POWER_PROFILE_HIGH_1_ADDRS (FLASH_NMPA_BASE + 0xDCU) // (0x9FCDCU) in lowpower_set_dcdc_power_profile()
1288 #define FLASH_NMPA_PVT_MONITOR_0_RINGO_ADDRS (FLASH_NMPA_BASE + 0x130U) in lowpower_get_part_process_corner()
1289 #define FLASH_NMPA_PVT_MONITOR_1_RINGO_ADDRS (FLASH_NMPA_BASE + 0x140U) in lowpower_get_part_process_corner()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5528/drivers/
Dfsl_power.c1191 #define FLASH_NMPA_BASE (0x9FC00u) in lowpower_set_dcdc_power_profile() macro
1192 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_0_ADDRS (FLASH_NMPA_BASE + 0xE0U) // (0x9FCE0U) in lowpower_set_dcdc_power_profile()
1193 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_1_ADDRS (FLASH_NMPA_BASE + 0xE4U) // (0x9FCE4U) in lowpower_set_dcdc_power_profile()
1194 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_0_ADDRS (FLASH_NMPA_BASE + 0xE8U) // (0x9FCE8U) in lowpower_set_dcdc_power_profile()
1195 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_1_ADDRS (FLASH_NMPA_BASE + 0xECU) // (0x9FCECU) in lowpower_set_dcdc_power_profile()
1196 #define FLASH_NMPA_DCDC_POWER_PROFILE_HIGH_0_ADDRS (FLASH_NMPA_BASE + 0xD8U) // (0x9FCD8U) in lowpower_set_dcdc_power_profile()
1197 #define FLASH_NMPA_DCDC_POWER_PROFILE_HIGH_1_ADDRS (FLASH_NMPA_BASE + 0xDCU) // (0x9FCDCU) in lowpower_set_dcdc_power_profile()
1288 #define FLASH_NMPA_PVT_MONITOR_0_RINGO_ADDRS (FLASH_NMPA_BASE + 0x130U) in lowpower_get_part_process_corner()
1289 #define FLASH_NMPA_PVT_MONITOR_1_RINGO_ADDRS (FLASH_NMPA_BASE + 0x140U) in lowpower_get_part_process_corner()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S26/drivers/
Dfsl_power.c1191 #define FLASH_NMPA_BASE (0x9FC00u) in lowpower_set_dcdc_power_profile() macro
1192 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_0_ADDRS (FLASH_NMPA_BASE + 0xE0U) // (0x9FCE0U) in lowpower_set_dcdc_power_profile()
1193 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_1_ADDRS (FLASH_NMPA_BASE + 0xE4U) // (0x9FCE4U) in lowpower_set_dcdc_power_profile()
1194 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_0_ADDRS (FLASH_NMPA_BASE + 0xE8U) // (0x9FCE8U) in lowpower_set_dcdc_power_profile()
1195 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_1_ADDRS (FLASH_NMPA_BASE + 0xECU) // (0x9FCECU) in lowpower_set_dcdc_power_profile()
1196 #define FLASH_NMPA_DCDC_POWER_PROFILE_HIGH_0_ADDRS (FLASH_NMPA_BASE + 0xD8U) // (0x9FCD8U) in lowpower_set_dcdc_power_profile()
1197 #define FLASH_NMPA_DCDC_POWER_PROFILE_HIGH_1_ADDRS (FLASH_NMPA_BASE + 0xDCU) // (0x9FCDCU) in lowpower_set_dcdc_power_profile()
1288 #define FLASH_NMPA_PVT_MONITOR_0_RINGO_ADDRS (FLASH_NMPA_BASE + 0x130U) in lowpower_get_part_process_corner()
1289 #define FLASH_NMPA_PVT_MONITOR_1_RINGO_ADDRS (FLASH_NMPA_BASE + 0x140U) in lowpower_get_part_process_corner()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S69/drivers/
Dfsl_power.c1191 #define FLASH_NMPA_BASE (0x9FC00u) in lowpower_set_dcdc_power_profile() macro
1192 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_0_ADDRS (FLASH_NMPA_BASE + 0xE0U) // (0x9FCE0U) in lowpower_set_dcdc_power_profile()
1193 #define FLASH_NMPA_DCDC_POWER_PROFILE_LOW_1_ADDRS (FLASH_NMPA_BASE + 0xE4U) // (0x9FCE4U) in lowpower_set_dcdc_power_profile()
1194 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_0_ADDRS (FLASH_NMPA_BASE + 0xE8U) // (0x9FCE8U) in lowpower_set_dcdc_power_profile()
1195 #define FLASH_NMPA_DCDC_POWER_PROFILE_MEDIUM_1_ADDRS (FLASH_NMPA_BASE + 0xECU) // (0x9FCECU) in lowpower_set_dcdc_power_profile()
1196 #define FLASH_NMPA_DCDC_POWER_PROFILE_HIGH_0_ADDRS (FLASH_NMPA_BASE + 0xD8U) // (0x9FCD8U) in lowpower_set_dcdc_power_profile()
1197 #define FLASH_NMPA_DCDC_POWER_PROFILE_HIGH_1_ADDRS (FLASH_NMPA_BASE + 0xDCU) // (0x9FCDCU) in lowpower_set_dcdc_power_profile()
1288 #define FLASH_NMPA_PVT_MONITOR_0_RINGO_ADDRS (FLASH_NMPA_BASE + 0x130U) in lowpower_get_part_process_corner()
1289 #define FLASH_NMPA_PVT_MONITOR_1_RINGO_ADDRS (FLASH_NMPA_BASE + 0x140U) in lowpower_get_part_process_corner()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5536/drivers/
Dfsl_clock.c59 #define FLASH_NMPA_BASE (0x3FC00u) macro
61 #define GET_HFXO_TRIM() (*(uint32_t *)(FLASH_NMPA_BASE + 0xC0U)) // (0x3FCC0)
62 #define GET_32KXO_TRIM() (*(uint32_t *)(FLASH_NMPA_BASE + 0xC4U)) // (0x3FCC4)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S36/drivers/
Dfsl_clock.c59 #define FLASH_NMPA_BASE (0x3FC00u) macro
61 #define GET_HFXO_TRIM() (*(uint32_t *)(FLASH_NMPA_BASE + 0xC0U)) // (0x3FCC0)
62 #define GET_32KXO_TRIM() (*(uint32_t *)(FLASH_NMPA_BASE + 0xC4U)) // (0x3FCC4)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5534/drivers/
Dfsl_clock.c59 #define FLASH_NMPA_BASE (0x3FC00u) macro
61 #define GET_HFXO_TRIM() (*(uint32_t *)(FLASH_NMPA_BASE + 0xC0U)) // (0x3FCC0)
62 #define GET_32KXO_TRIM() (*(uint32_t *)(FLASH_NMPA_BASE + 0xC4U)) // (0x3FCC4)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5506/
DLPC5506.h11761 #define FLASH_NMPA_BASE (0x1003FC00u) macro
11765 #define FLASH_NMPA ((FLASH_NMPA_Type *)FLASH_NMPA_BASE)
11769 #define FLASH_NMPA_BASE_ADDRS { FLASH_NMPA_BASE }
11778 #define FLASH_NMPA_BASE (0x3FC00u) macro
11780 #define FLASH_NMPA ((FLASH_NMPA_Type *)FLASH_NMPA_BASE)
11782 #define FLASH_NMPA_BASE_ADDRS { FLASH_NMPA_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5506CPXXXX/
DLPC5506CPXXXX.h11716 #define FLASH_NMPA_BASE (0x1003FC00u) macro
11720 #define FLASH_NMPA ((FLASH_NMPA_Type *)FLASH_NMPA_BASE)
11724 #define FLASH_NMPA_BASE_ADDRS { FLASH_NMPA_BASE }
11733 #define FLASH_NMPA_BASE (0x3FC00u) macro
11735 #define FLASH_NMPA ((FLASH_NMPA_Type *)FLASH_NMPA_BASE)
11737 #define FLASH_NMPA_BASE_ADDRS { FLASH_NMPA_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5502CPXXXX/
DLPC5502CPXXXX.h11716 #define FLASH_NMPA_BASE (0x1003FC00u) macro
11720 #define FLASH_NMPA ((FLASH_NMPA_Type *)FLASH_NMPA_BASE)
11724 #define FLASH_NMPA_BASE_ADDRS { FLASH_NMPA_BASE }
11733 #define FLASH_NMPA_BASE (0x3FC00u) macro
11735 #define FLASH_NMPA ((FLASH_NMPA_Type *)FLASH_NMPA_BASE)
11737 #define FLASH_NMPA_BASE_ADDRS { FLASH_NMPA_BASE }

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