| /hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F51212/ |
| D | MKV31F51212.h | 3677 #define FB_CSCR_SWS_MASK (0xFC000000U) macro 3679 …) (((uint32_t)(((uint32_t)(x)) << FB_CSCR_SWS_SHIFT)) & FB_CSCR_SWS_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK22F51212/ |
| D | MK22F51212.h | 3695 #define FB_CSCR_SWS_MASK (0xFC000000U) macro 3697 …) (((uint32_t)(((uint32_t)(x)) << FB_CSCR_SWS_SHIFT)) & FB_CSCR_SWS_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK22F12/ |
| D | MK22F12.h | 7648 #define FB_CSCR_SWS_MASK (0xFC000000U) macro 7650 …) (((uint32_t)(((uint32_t)(x)) << FB_CSCR_SWS_SHIFT)) & FB_CSCR_SWS_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK24F12/ |
| D | MK24F12.h | 9938 #define FB_CSCR_SWS_MASK (0xFC000000U) macro 9942 …) (((uint32_t)(((uint32_t)(x)) << FB_CSCR_SWS_SHIFT)) & FB_CSCR_SWS_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/K32L3A60/ |
| D | K32L3A60_cm4.h | 6396 #define FB_CSCR_SWS_MASK (0xFC000000U) macro 6399 …) (((uint32_t)(((uint32_t)(x)) << FB_CSCR_SWS_SHIFT)) & FB_CSCR_SWS_MASK)
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| D | K32L3A60_cm0plus.h | 5449 #define FB_CSCR_SWS_MASK (0xFC000000U) macro 5452 …) (((uint32_t)(((uint32_t)(x)) << FB_CSCR_SWS_SHIFT)) & FB_CSCR_SWS_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK64F12/ |
| D | MK64F12.h | 11736 #define FB_CSCR_SWS_MASK (0xFC000000U) macro 11740 …) (((uint32_t)(((uint32_t)(x)) << FB_CSCR_SWS_SHIFT)) & FB_CSCR_SWS_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK63F12/ |
| D | MK63F12.h | 11723 #define FB_CSCR_SWS_MASK (0xFC000000U) macro 11727 …) (((uint32_t)(((uint32_t)(x)) << FB_CSCR_SWS_SHIFT)) & FB_CSCR_SWS_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKV56F24/ |
| D | MKV56F24.h | 12240 #define FB_CSCR_SWS_MASK (0xFC000000U) macro 12244 …) (((uint32_t)(((uint32_t)(x)) << FB_CSCR_SWS_SHIFT)) & FB_CSCR_SWS_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKV58F24/ |
| D | MKV58F24.h | 14006 #define FB_CSCR_SWS_MASK (0xFC000000U) macro 14010 …) (((uint32_t)(((uint32_t)(x)) << FB_CSCR_SWS_SHIFT)) & FB_CSCR_SWS_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK80F25615/ |
| D | MK80F25615.h | 9722 #define FB_CSCR_SWS_MASK (0xFC000000U) macro 9724 …) (((uint32_t)(((uint32_t)(x)) << FB_CSCR_SWS_SHIFT)) & FB_CSCR_SWS_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK82F25615/ |
| D | MK82F25615.h | 9716 #define FB_CSCR_SWS_MASK (0xFC000000U) macro 9718 …) (((uint32_t)(((uint32_t)(x)) << FB_CSCR_SWS_SHIFT)) & FB_CSCR_SWS_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK28FA15/ |
| D | MK28FA15.h | 9049 #define FB_CSCR_SWS_MASK (0xFC000000U) macro 9051 …) (((uint32_t)(((uint32_t)(x)) << FB_CSCR_SWS_SHIFT)) & FB_CSCR_SWS_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK27FA15/ |
| D | MK27FA15.h | 9047 #define FB_CSCR_SWS_MASK (0xFC000000U) macro 9049 …) (((uint32_t)(((uint32_t)(x)) << FB_CSCR_SWS_SHIFT)) & FB_CSCR_SWS_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK26F18/ |
| D | MK26F18.h | 11560 #define FB_CSCR_SWS_MASK (0xFC000000U) macro 11564 …) (((uint32_t)(((uint32_t)(x)) << FB_CSCR_SWS_SHIFT)) & FB_CSCR_SWS_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK65F18/ |
| D | MK65F18.h | 13377 #define FB_CSCR_SWS_MASK (0xFC000000U) macro 13381 …) (((uint32_t)(((uint32_t)(x)) << FB_CSCR_SWS_SHIFT)) & FB_CSCR_SWS_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK66F18/ |
| D | MK66F18.h | 13377 #define FB_CSCR_SWS_MASK (0xFC000000U) macro 13381 …) (((uint32_t)(((uint32_t)(x)) << FB_CSCR_SWS_SHIFT)) & FB_CSCR_SWS_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U3/ |
| D | MCIMX7U3_cm4.h | 6814 #define FB_CSCR_SWS_MASK (0xFC000000U) macro 6817 …) (((uint32_t)(((uint32_t)(x)) << FB_CSCR_SWS_SHIFT)) & FB_CSCR_SWS_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U5/ |
| D | MCIMX7U5_cm4.h | 6815 #define FB_CSCR_SWS_MASK (0xFC000000U) macro 6818 …) (((uint32_t)(((uint32_t)(x)) << FB_CSCR_SWS_SHIFT)) & FB_CSCR_SWS_MASK)
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